Cadence Design Systems Profile

Cadence Design Systems Patent Grants

Method and apparatus for efficient generation of compact waveform-based timing models

Patent Number 9727676 - August 8, 2017

For a circuit path to be represented in a timing model, a set of propagating waveforms substantially converges through waveform stabilization…

Multiprocessing subsystem with FIFO/buffer modes for flexible input/output processing in an emulation system

Patent Number 9721048 - August 1, 2017

In a system and method for emulating a circuit design, an emulation system receives input instructions from a host device executing the…

Concurrent design process

Patent Number 9721052 - August 1, 2017

The present disclosure relates to a system and method for multi-user, at least partially concurrent, electronic circuit design. Embodiments…

Methods, systems, and articles of manufacture for implementing an electronic design with disconnected field domains

Patent Number 9715569 - July 25, 2017

Disclosed are techniques for devising an electronic design with disconnected field domains. These techniques identify a plurality of…

Using smart timing models for gate level timing simulation

Patent Number 9710579 - July 18, 2017

A system and method for simulating the timing of an integrated circuit design using abstract timing models. An abstract or smart timing model…

Cadence Design Systems Patent Applications

Systems And Methods For Binding Mismatched Schematic And Layout Design Hierarchy

Application Number 20170124235 - May 4, 2017

Disclosed herein are systems and methods that allow a layout editor function, presented in a graphical user interface, of an EDA, to indicate…

SYSTEM AND METHOD FOR IMPLEMENTING AND VALIDATING STAR ROUTING FOR POWER CONNECTIONS AT CHIP LEVEL

Application Number 20160210393 - July 21, 2016

A system, method, and computer program product for automating the design and routing of non-shared one-to-many conductive pathways between a…

METHODS, SYSTEMS, AND ARTICLES OF MANUFACTURE FOR IMPLEMENTING HIGH CURRENT CARRYING INTERCONNECTS IN ELECTRONIC DESIGNS

Application Number 20160070841 - March 10, 2016

Various embodiments implement additional connectivity for electronic designs by identifying one or more regions for a route in normal…

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR SCHEMATIC DRIVEN, UNIFIED THERMAL AND ELECTROMAGNETIC INTERFERENCE COMPLIANCE ANALYSES FOR ELECTRONIC CIRCUIT DESIGNS

Application Number 20160063171 - March 3, 2016

Disclosed are methods and systems for by identifying or generating an electrical schematic, generating a thermal schematic by associating…

DEBUGGING SESSION HANDOVER

Application Number 20140281730 - September 18, 2014

A method includes, during operation of a software debugging tool on a software program, and upon indication by a first user of the software…

Cadence Design Systems Federal District Court Decisions

Cadence Design Systems, Ltd. et al v. Key ASIC, Inc. et al

California Northern District Court - May 4, 2016

CASE MANAGEMENT ORDER re 28 Case Management Conference - Initial, Last Day to Hear Dispositive Motions set for 02/15/2018 at 09:00 AM. …

Plaintiff v. Defendant

California Northern District Court - May 3, 2016

ORDER re 728 Status Report filed by Aetna Life Insurance Company. Having reviewed the Joint Status Report filed on April 22, 2016 (Dkt.…

Plaintiff v. Defendant

California Northern District Court - June 17, 2014

ORDER granting 329 Motion to Stay; denying without prejudice 255 , 279 , 326 , 329 , 363 , 387 , 389 , 459 , 460 , 462 , 558 …

Plaintiff v. Defendant

California Northern District Court - June 4, 2014

ORDER RE: HEARING ON JUNE 6, 2014. The court finds the motions to dismiss and to sever as well as the motion for sanctions and requests for…

Plaintiff v. Defendant

California Northern District Court - April 4, 2014

ORDER GRANTING 652 Notice of Voluntary Dismissal filed by Bay Area Surgical Group Inc. AS TO AVIDEX INDUSTRIES, LLC and AVIDEX INDUSTRIES…