Cypress Semiconductor Patent Applications

SIGNATURE GRAPH METHOD FOR ENABLING HUMAN AUTHENTICATION OF HIGH-ENTROPY DATA

Granted: February 1, 2024
Application Number: 20240039732
A signature graph method is proposed to authenticate shared high-entropy data using a graph that can be easily identified by human eyes (or by computer image recognition algorithms). An example method for authenticating a shared data element comprises receiving a data element to be shared; transforming the data element to be shared into signature graph data, using at least one collision-resistant one-way mapping function; and rendering a human-perceptible representation of the signature…

FRAME SYNCH DETECTION WITH RATE ADAPTATION

Granted: February 1, 2024
Application Number: 20240039690
A device includes a receiver to receive a packet over a channel at a first frequency and generate a sampled stream of data at a first sample rate corresponding to the first frequency. A data resampler circuit includes a re-timer engine to determine, using a fractional rate between the first sample rate and a crystal oscillator (XO)-divided sample rate, re-timer values including a difference between pulses of a pseudo clock corresponding to the XO-integer-divided sample rate and closest…

SYSTEMS, METHODS, AND DEVICES FOR ENHANCED INTEGRATION OF WIRELESS ENVIRONMENTS

Granted: January 25, 2024
Application Number: 20240031833
Systems, methods, and devices enhance integration of components of a wireless environment. Methods include determining, using a processing device, a plurality of contextual parameters identifying a plurality of settings associated with an application executed on a central wireless device and a plurality of wireless devices included in an operational environment of the central wireless device. Methods also include determining, using the processing device, a plurality of wireless device…

UNINTENTIONAL TOUCH DETECTION

Granted: January 25, 2024
Application Number: 20240028161
A scanning operation is performed to measure a first capacitance of a first sensor arrangement located proximate a capacitive sensor that corresponds to a function of a device. In response to the first capacitance not exceeding a first threshold, the scanning operation measures a second capacitance of the capacitive sensor to create an output used to control the function of the device. In response to the first capacitance exceeding the first threshold, operation of the scanning operation…

SYSTEMS, METHODS, AND DEVICES FOR ENHANCED INTEGRATION OF WIRELESS ENVIRONMENTS

Granted: January 25, 2024
Application Number: 20240031833
Systems, methods, and devices enhance integration of components of a wireless environment. Methods include determining, using a processing device, a plurality of contextual parameters identifying a plurality of settings associated with an application executed on a central wireless device and a plurality of wireless devices included in an operational environment of the central wireless device. Methods also include determining, using the processing device, a plurality of wireless device…

UNINTENTIONAL TOUCH DETECTION

Granted: January 25, 2024
Application Number: 20240028161
A scanning operation is performed to measure a first capacitance of a first sensor arrangement located proximate a capacitive sensor that corresponds to a function of a device. In response to the first capacitance not exceeding a first threshold, the scanning operation measures a second capacitance of the capacitive sensor to create an output used to control the function of the device. In response to the first capacitance exceeding the first threshold, operation of the scanning operation…

Method of Forming High-Voltage Transistor with Thin Gate Poly

Granted: January 4, 2024
Application Number: 20240008279
A semiconductor device and method of fabricating the same are disclosed. The method includes depositing a polysilicon gate layer over a gate dielectric formed over a surface of a substrate in a peripheral region, forming a dielectric layer over the polysilicon gate layer and depositing a height-enhancing (HE) film over the dielectric layer. The HE film, the dielectric layer, the polysilicon gate layer and the gate dielectric are then patterned for a high-voltage Field Effect Transistor…

SYSTEMS, METHODS, AND DEVICES FOR COEXISTENCE ENHANCEMENT USING ACKNOWLEDGMENT SIGNALS IN WIRELESS DEVICES

Granted: January 4, 2024
Application Number: 20240008066
Systems, methods, and devices implement enhanced coexistence of radios within wireless devices. Methods include receiving a data packet at a wireless device, the data packet having a packet structure, the wireless device comprising a first wireless radio collocated with a second wireless radio, and identifying one or more features of the data packet based, at least in part, on the packet structure of the data packet. Methods further include updating a medium access grant signal…

INDEPENDENTLY CLOCKING DIGITAL LOOP FILTER BY TIME-TO-DIGITAL CONVERTER IN DIGITAL PHASE-LOCKED LOOP

Granted: January 4, 2024
Application Number: 20240007113
A time-to-digital converter (TDC) circuit includes phase error calculation circuitry to: determine phase error values based on a time difference between a input reference clock and a feedback clock of a digital phase-locked loop (DPLL) circuit, the input reference clock and the feedback clock being unsynchronized; and provide the phase error values to a digital loop filter (DLF) of the DPLL circuit. The TDC circuit further includes clock generation circuitry to: generate a filter clock…

EFFICIENCY IMPROVEMENT FOR POWER FACTOR CORRECTION BASED AC-DC POWER ADAPTERS

Granted: December 14, 2023
Application Number: 20230402914
Controlling power factor correction (PFC) in a secondary-controlled alternating current (AC) to direct current (DC) (AC-DC) power adapter is described. In one embodiment, an apparatus includes a transformer, a primary-side controller coupled to the transformer, a PFC component coupled to the primary-side controller, and a secondary-side controller coupled to the transformer. The secondary-side controller is configured at least to obtain data informative of an amount of power, and…

ENHANCEMENT OF RANGE AND THROUGHPUT FOR MULTI-ANTENNA WIRELESS COMMUNICATIONS DEVICES

Granted: November 30, 2023
Application Number: 20230387969
Systems, methods, and devices select antennas to enhance the range and throughput of wireless communications devices. Methods include identifying a plurality of combinations of antennas based on a plurality of available antennas for a wireless communications device, and generating, using a processing device included in a multiple-input-multiple-output (MIMO) device, a plurality of quality metrics including at least one quality metric for each of the identified combinations of antennas,…

Synchronous Rectifier Scheme for Continuous Conduction Mode in Primary Side Controlled Fly-Back Converter

Granted: November 30, 2023
Application Number: 20230387818
A primary-side-controlled fly-back converter is provided to eliminate cross-conduction between a power-switch (PS) on a primary side and a synchronous-rectifier (SR) on a secondary side when operating in continuous conduction mode (CCM). Generally, the converter includes a transformer having a primary coupled to a rectified AC input through the PS, and a secondary coupled to a DC output through the SR, the SR having a drain coupled to the secondary winding. A fly-back-controller includes…

DRIVE SCHEME FOR SECONDARY-CONTROLLED ACTIVE CLAMP FLYBACK (ACF) MODE

Granted: November 23, 2023
Application Number: 20230378877
Controlling an active clamp field effect transistor (FET) and a primary-side FET in a secondary-controlled active clamp converter is described. In one embodiment, an apparatus includes a primary-side FET coupled to a transformer and an active clamp FET disposed on a primary side of the transformer. A secondary-side controller is configured to control the active clamp FET and the primary-side FET across a same galvanic isolation barrier.

SECURITY ENHANCEMENT FOR MULTI-USER RANGING SYSTEMS USING SIGNATURE ORTHOGONAL CHIRPS

Granted: November 23, 2023
Application Number: 20230375688
Techniques described here introduce signature frequency modulation to unmodulated pulse signals as frequency chirps to enhance the security of multi-carrier phase-based ranging signals. The characteristics of the chirps may be mutually known by an initiator and a desired reflector of the ranging applications. The characteristics of the chirps may vary between the multi-carrier signals to thwart any attempt by an eavesdropper to predict the chirps. In one aspect, the characteristics of…

VOLTAGE BUS DISCHARGE FOR UNIVERSAL SERIAL BUS POWER DELIVERY

Granted: November 9, 2023
Application Number: 20230361689
A secondary side controller for a flyback converter can include a synchronous rectifier (SR) gate driver pin coupled to a gate of an SR transistor on a secondary side of the flyback converter. An error amplifier is coupled to an output of a voltage bus of the flyback converter, the error amplifier to generate an error signal indicative of a voltage of the output of the voltage bus. Control logic is coupled to the error amplifier and to the SR transistor, the control logic to: detect when…

MULTIMODE WIRELESS CHARGING TRANSMITTER CONTROL

Granted: November 9, 2023
Application Number: 20230361600
Systems, methods, and devices are described to improve wireless charging devices. Systems include a power inverter configured to generate a power transfer signal based, at least in part, on a plurality of transmission parameters, a transmission element configured to wirelessly transmit the power transfer signal, and a controller configured to determine a power transfer mode used by the power inverter based, at least in part, on a plurality of operational parameters and a plurality of…

DETERMINATION AND TRACKING OF TRAJECTORIES OF MOVING OBJECTS IN WIRELESS APPLICATIONS

Granted: November 2, 2023
Application Number: 20230353980
Implementations disclosed describe techniques and systems for efficient determination and tracking of trajectories of objects in an environment of a wireless device. The disclosed techniques include, among other things, determining multiple sets of sensing values that characterize one or more radio signals received, during a respective sensing event, from an object in an environment of the wireless device. Multiple likelihood vectors may be obtained using the sensing values and…

TRACKING OF OBJECTS USING RECONSTRUCTION OF DATA CARRIED BY WIRELESS SENSING SIGNALS FROM LIMITED SENSING FREQUENCIES

Granted: November 2, 2023
Application Number: 20230353979
Implementations disclosed describe techniques and systems for efficient determination and tracking of trajectories of objects in an environment of a wireless device. The disclosed techniques include, among other things, obtaining multiple sets of sensing values that characterize one or more radio signals received, during a respective sensing event, from an object in an environment of the wireless device. The sensing signals may be carried by waves with randomly selected frequencies…

OPTIMIZATION OF ENVIRONMENTAL SENSING IN WIRELESS NETWORKS

Granted: November 2, 2023
Application Number: 20230350042
Implementations disclosed describe techniques and systems for efficient estimation of spatial characteristics of an outside environment of a wireless device. The disclosed techniques include generating multiple covariance matrices (CMs) representative of obtained sensing values. Different CMs may be associated with different frequency increments used in sensing signals to probe the outside environment. The disclosed techniques may further include determining eigenvectors for the CMs, and…

ESD PROTECTION CIRCUIT

Granted: October 26, 2023
Application Number: 20230343779
An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a…