Temperature compensated resonator with a pair of spaced apart internal dielectric layers
Granted: August 30, 2016
Patent Number:
9431993
A device includes a substrate, an electrode supported by the substrate, an anchor supported by the substrate, and a composite structure supported by the anchor, disposed adjacent the electrode, and configured for resonant vibration. The composite structure includes an external layer and an internal dielectric region covered by the external layer.
Last gasp hold-up circuit using adaptive constant on time control
Granted: May 10, 2016
Patent Number:
9335772
A hold-up circuit coupled to a first node to receive an input voltage and to provide a hold-up voltage includes an inductor, a constant on-time buck-boost control circuit configured to drive a high-side power switch and a low-side power switch to operate in a buck mode and a boost mode of operation, and an energy storage capacitor. When the input voltage is greater than a predetermined threshold, the buck-boost control circuit is configured to drive the power switches in the boost mode…
Boost regulator incorporating peak inductor current modulation
Granted: April 26, 2016
Patent Number:
9325243
A boost switching regulator incorporates a peak inductor current modulation circuit to modulate the peak inductor current as a function of the load current, the input voltage, the regulated output voltage, and a fixed current value. In this manner, the switching frequency of the boost regulator can be maintained above a given value or within a given frequency range over a wide range of load conditions and also over input voltage variations and output voltage settings.
Optimal ripple injection for a boost regulator
Granted: April 5, 2016
Patent Number:
9306454
A boost switching regulator incorporates a ripple injection circuit to generate a voltage ripple signal for feedback control that mimics the actual ripple signal of the regulated output voltage. In this manner, the ripple injection circuit achieves optimal ripple injection for stable and enhanced feedback control. In one embodiment, the injected ripple signal is generated from a current injection signal that mimics the difference between the inductor current that flows through the…
ESD protection for MEMS resonator devices
Granted: February 23, 2016
Patent Number:
9266722
Disclosed herein are MEMS resonator device designs and fabrication techniques that provide protection against electrostatic charge imbalances. In one aspect, a MEMS resonator device includes a substrate, an electrode including a first microstructure supported by the substrate, a resonant element including a second microstructure spaced from the first microstructure by a gap for resonant displacement of the second microstructure within the gap during operation, and a disabled shunt…
PLL frequency synthesizer with multi-curve VCO implementing closed loop curve searching
Granted: January 19, 2016
Patent Number:
9240796
A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate…
Current sharing method for COT buck converter
Granted: December 15, 2015
Patent Number:
9214866
A power system for providing an output current at a regulated system output voltage includes a first power stage and a second power stage, each being a constant on-time (COT) controlled power converter. The first and second power stages generate respective first and second regulated output voltage having reduced or very small output ripple at a common output voltage node. The first and second power stages each includes a ripple injection circuit to inject a ripple signal to the feedback…
Buck DC-DC converter with accuracy enhancement
Granted: December 1, 2015
Patent Number:
9201438
A buck switching regulator includes a feedback control circuit including a first gain circuit generating a first feedback signal indicative of the regulated output voltage; a ripple generation circuit generating a ripple signal that is injected to the first feedback signal; and a comparator receiving a first reference signal and the first feedback signal to generate a comparator output signal. The switching regulator further includes an offset compensation circuit including a second gain…
Time-to-digital converter
Granted: November 17, 2015
Patent Number:
9188961
A time-to-digital converter (TDC) incorporates a resistor-stabilized delay line, a sampling circuit and a processing circuit. The resistor-stabilized delay line operates to limit the variation in delay values for the delay elements in the delay line due to fabrication process variations. In some embodiments, the resistor-stabilized delay line limits the delay variation of each delay element to a fraction of the delay.
Planar vertical DMOS transistor with a conductive spacer structure as gate
Granted: November 10, 2015
Patent Number:
9184278
A planar vertical DMOS transistor uses a conductive spacer structure formed on the sides of a dielectric structure as the gate of the transistor. The planar vertical DMOS transistor with a conductive spacer gate structure reduces the parasitic gate-to-bulk or gate-to-drain overlap capacitance by eliminating the conductive gate material that is formed above the bulk of the semiconductor layer. Meanwhile, the desired distance between the body regions formed on opposing sides of the…
Planar vertical DMOS transistor with reduced gate charge
Granted: November 3, 2015
Patent Number:
9178054
A planar vertical DMOS transistor includes a dielectric separation structure formed under the conductive gate and over the bulk of the semiconductor layer outside of the channel region of the transistor. The planar vertical DMOS transistor with a conductive gate formed over the dielectric structure reduces the parasitic gate-to-bulk or gate-to-drain overlap capacitance by increasing the separation between the conductive gate and the bulk of the semiconductor layer. Meanwhile, the desired…
Signal level detect circuit with reduced loss-of-signal assertion delay
Granted: October 20, 2015
Patent Number:
9166702
A signal level detect circuit configured to assess an input signal with varying amplitude signal levels and to generate an indicator signal includes an input circuit configured to receive the input signal and to process the input signal, the input circuit including a first node on which the input signal is sampled; a comparator configured to compare the processed input signal to a signal level threshold and generate a comparator output signal; and an active discharge circuit configured…
Battery charger voltage control method for instant boot-up
Granted: October 6, 2015
Patent Number:
9153987
A battery charger voltage control method dynamically adjusts the system voltage generated by a battery charger circuit based on the operating conditions to ensure that sufficient power is supplied to power up the circuitry of the electronic device when the battery charger circuit is connected to a current-limited power source and the battery of the electronic device is deeply depleted or is missing. In embodiments of the present invention, the battery charger voltage control method sets…
Current sensing using a metal-on-passivation layer on an integrated circuit die
Granted: September 8, 2015
Patent Number:
9128125
A current sense resistor integrated with an integrated circuit die where the integrated circuit die is housed in a flip-chip semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer having an array of metal pillars extending therefrom. The metal pillars are electrically connected to a first leadframe portion and a second leadframe portion of the semiconductor package where the first leadframe portion and the second…
Adaptive pause time energy efficient ethernet PHY
Granted: July 28, 2015
Patent Number:
9094197
An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device…
Timer based PFM exit control method for a boost regulator
Granted: July 28, 2015
Patent Number:
9093899
A control circuit in a PFM/PWM boost switching regulator includes a timer based PFM exit control circuit configured to receive a first control signal for controlling a main power switch, a zero-cross signal indicative of an inductor current having reached zero current value, and a timer reference signal indicative of a timer threshold duration. The timer based PFM exit control circuit assesses an idle time of the inductor current based on the first control signal and the zero-cross…
PLL frequency synthesizer with multi-curve VCO implementing closed loop curve searching using charge pump current modulation
Granted: June 2, 2015
Patent Number:
9048848
A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to perform a closed loop curve search operation to select one of the operating curves in the multi-curve VCO and to perform a curve tracking…
PLL frequency synthesizer with multi-curve VCO implementing closed loop curve searching
Granted: May 12, 2015
Patent Number:
9030241
A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate…
High compliance laser driver circuit
Granted: May 5, 2015
Patent Number:
9025629
A laser driver circuit having a differential circuit and an output circuit includes a control circuit receiving a regulated supply voltage that also supplies the differential circuit as an input signal. The control circuit generates a feedback voltage across a first resistor to cause a first current to flow in the first resistor having a current value equal or proportional to the modulation current value. The laser driver circuit includes an operational amplifier receiving the feedback…
Switching regulator including a configurable multi-mode PWM controller implementing multiple control schemes
Granted: April 21, 2015
Patent Number:
9013165
A multi-mode pulse width modulation (PWM) controller for a buck switching regulator includes a multi-mode PWM control circuit where the PWM control circuit is configured to operate in one of multiple control schemes selectable by a mode select signal. In one embodiment, the multi-mode PWM control circuit incorporates a peak current mode control scheme, a voltage mode control scheme, and a valley current mode control scheme. In another embodiment, the multi-mode PWM control circuit…
