OCZ Technology Patent Applications

CACHE DEVICE FOR HARD DISK DRIVES AND METHODS OF OPERATION

Granted: May 15, 2014
Application Number: 20140136766
A solid-state mass storage device adapted to be used as a cache for an hard disk drive that utilizes a more efficient logical data management method relative to conventional systems. The storage device includes a circuit board, a memory controller, at least one non-volatile memory device, and at least two data interfaces. The storage device is coupled to a host computer system and configured to operate as a cache for at least one hard disk drive. The storage device is interposed between…

INTEGRATED STORAGE/PROCESSING DEVICES, SYSTEMS AND METHODS FOR PERFORMING BIG DATA ANALYTICS

Granted: May 8, 2014
Application Number: 20140129753
Architectures and methods for performing big data analytics by providing an integrated storage/processing system containing non-volatile memory devices that form a large, non-volatile memory array and a graphics processing unit (GPU) configured for general purpose (GPGPU) computing. The non-volatile memory array is directly functionally coupled (local) with the GPU and optionally mounted on the same board (on-board) as the GPU.

METHODS AND APPARATUS FOR PROVIDING ACCELERATION OF VIRTUAL MACHINES IN VIRTUAL ENVIRONMENTS

Granted: February 20, 2014
Application Number: 20140052892
A host server computer system that includes a hypervisor within a virtual space architecture running at least one virtualization, acceleration and management server and at least one virtual machine, at least one virtual disk that is read from and written to by the virtual machine, a cache agent residing in the virtual machine, wherein the cache agent intercepts read or write commands made by the virtual machine to the virtual disk, and a solid state drive. The solid state drive includes…

NON-VOLATILE SOLID STATE MEMORY-BASED MASS STORAGE DEVICE AND METHODS THEREOF

Granted: January 30, 2014
Application Number: 20140029341
Non-volatile solid state mass storage device and methods for improving write performance thereof. The storage device includes a NAND flash controller, an array of NAND flash memory integrated circuits, and means for determining a lowest unused page number of each write target block in a group of the NAND flash memory integrated circuits that are simultaneously accessible at any given time by a write command. The storage device has further means for programming a dummy write to at least a…

SOLID-STATE MASS STORAGE DEVICE AND METHODS OF OPERATION

Granted: November 28, 2013
Application Number: 20130318393
A volatile memory-based solid-state mass storage device adapted for use in a host system as a storage tier. The storage device includes a substrate on which is mounted a system interface, a control circuitry, and a plurality of substantially identical random access memory components that define at least one memory array. Each memory component of the memory array has associated therewith an input/output path, a width of the input/output path, and a burst length. The storage device is…

MODULAR MASS STORAGE SYSTEM AND METHOD THEREFOR

Granted: September 5, 2013
Application Number: 20130232298
A modular mass storage system and method that enables cableless mounting of ATA and/or similar high speed interface-based mass storage devices in a computer system. The system includes a printed circuit board, a system expansion slot interface on the printed circuit board and comprising power and data pins, a host bus controller on the printed circuit board and electrically connected to the system expansion slot interface, docking connectors connected with the host bus controller to…

GRAPHENE-BASED MEMORY DEVICES AND METHODS THEREFOR

Granted: August 29, 2013
Application Number: 20130223166
Memory technology adapted to store data in a binary format. Such technology includes a semiconductor memory device having memory cells, each having a substrate and at least three graphene layers that are oriented to define a graphene stack disposed in a plane. The graphene stack of each memory cell is connected to a bit line and to a ground connection so that a conductive path is defined in the plane of the graphene stack. The in-plane conductivity of the graphene stack of each memory…

APPARATUS, METHODS AND ARCHITECTURE TO INCREASE WRITE PERFORMANCE AND ENDURANCE OF NON-VOLATILE SOLID STATE MEMORY COMPONENTS

Granted: August 8, 2013
Application Number: 20130205076
A solid-state mass storage device for use with host computer systems, and methods of increasing the endurance of non-volatile memory components thereof that define a first non-volatile memory space. The mass storage device further has a second non-volatile memory space containing at least one non-volatile memory component having a higher write endurance than the memory components of the first non-volatile memory space. The second non-volatile memory space functions as a low-pass filter…

NAND FLASH-BASED STORAGE DEVICE AND METHODS OF USING

Granted: May 16, 2013
Application Number: 20130124787
A solid state drive having at least one NAND flash memory component organized in blocks, pages and cells. Each cell is adapted to store at least two bits. Each block of the memory component is adapted to be dynamically configured to store at least one bit per cell using a first mode of operation and dynamically configured to store at least two bits per cell using a second mode of operation while the mass storage device is operating, wherein the first mode of operation entails programming…

METHODS AND APPARATUS FOR PROVIDING HYPERVISOR-LEVEL ACCELERATION AND VIRTUALIZATION SERVICES

Granted: May 9, 2013
Application Number: 20130117744
Systems and methods for maintaining cache synchronization in network of cross-host multi-hypervisor systems, wherein each host has least one virtual server in communication with a virtual disk, an adaptation layer, a cache layer governing a cache and a virtualization and acceleration server to manage volume snapshot, volume replication and synchronization services across the different host sites.

SYSTEM AND METHOD FOR INCREASING DDR MEMORY BANDWIDTH IN DDR SDRAM MODULES

Granted: March 7, 2013
Application Number: 20130058179
A system and method for increasing DDR memory bandwidth in DDR SDRAM modules are provided. DDR memory has an inherent feature called the Variable Early Read command, where the read command is issued on CAS latency before the completion of the ongoing data burst and the effect of the CAS latency is minimized in terms of the effect on bandwidth. The system and method optimizes the remaining two access latencies (tRP and tRCD) for optimal bandwidth.

POWER SUPPLY FOR A COMPUTER SYSTEM HAVING CUSTOMIZEABLE CABLE EXTENSIONS

Granted: January 24, 2013
Application Number: 20130020126
Power supply systems and methods for their use in computer systems. The systems and methods make use of a power supply unit to which a main power cable and multiple cable stubs are electrically connected. The power cable is adapted to provide power to a motherboard of a computer system, and the multiple cable stubs are adapted to provide power to peripheral devices within the computer system. At least two of the cable stubs have different lengths. Each of the cable stubs has a…

SOLID-STATE MEMORY-BASED STORAGE METHOD AND DEVICE WITH LOW ERROR RATE

Granted: January 24, 2013
Application Number: 20130024735
Non-volatile solid-state memory-based storage devices and methods of operating the storage devices to have low initial error rates. The storage devices and methods use bit error rate comparison of duplicate writes to one or more non-volatile memory devices. The data set with a lower bit error rate as determined during verification is maintained, whereas data sets with higher bit error rates are discarded. A threshold of bit error rates can be used to trigger the duplication of data for…

MASS STORAGE DEVICE FOR A COMPUTER SYSTEM AND METHOD THEREFOR

Granted: December 6, 2012
Application Number: 20120304455
A method and mass storage device that combine multiple solid state drives (SSDs) to a single volume. The device includes a carrier board and at least two solid state drives having power and data connections to the carrier board. The carrier board includes a circuit board functionally connected to a control logic and at least two secondary connectors that are disposed at different edges of the circuit board and functionally connected to the control logic. The solid state drives are…

SOLID STATE MEMORY-BASED MASS STORAGE DEVICE USING OPTICAL INPUT/OUTPUT LINKS

Granted: August 9, 2012
Application Number: 20120203957
A solid state memory-based mass storage device and a method of transferring data between a memory controller and at least one memory device of the mass storage device through optical input/output links that transmit multiplexed optical data signals between the memory device and controller.

MOUNTING STRUCTURE AND METHOD FOR DISSIPATING HEAT FROM A COMPUTER EXPANSION CARD

Granted: July 5, 2012
Application Number: 20120170210
A mounting structure adapted for mounting an expansion card within a computer enclosure and configured to directly absorb and conduct heat from a heat source (such as an IC chip) on the card to the ambient atmosphere surrounding the enclosure. The mounting structure includes a mounting bracket, a heat sink adapted to contact a surface of the heat source on the expansion card, an extension interconnecting the heat sink and the mounting bracket, one or more features for conducting heat…

SOLID STATE DRIVE WITH LOW WRITE AMPLIFICATION

Granted: July 5, 2012
Application Number: 20120173795
A solid state drive having a non-volatile memory device and methods of operating the solid state drive to compare existing data stored on the memory device to subsequent data in an incoming data stream received by the solid state drive from a host system. If matching data are found, the solid state drive uses the existing data instead of writing the subsequent data to the memory device. Common data patterns can be shared among different files stored on the memory device.

METHODS, STORAGE DEVICES, AND SYSTEMS FOR PROMOTING THE ENDURANCE OF NON-VOLATILE SOLID-STATE MEMORY COMPONENTS

Granted: June 28, 2012
Application Number: 20120166716
Solid-state mass storage devices, host computer systems, and methods of increasing the endurance of non-volatile solid-state memory components used therein. The memory components comprise memory cells organized in functional units that are adapted to receive units of data transferred from the host computer system and correspond to the functional units of the memory component. The level of programming for each cell is reduced by performing an analysis of the bit values of the units of…

APPARATUS FOR OPTIMIZING SUPPLY POWER OF A COMPUTER COMPONENT AND METHODS THEREFOR

Granted: June 14, 2012
Application Number: 20120151242
A system and method for monitoring power consumption of a computer system component, such as a central processing unit (CPU), of a desktop computer system. The component is supplied with supply power from a power supply unit of the computer through a power supply cable. A coupling is disposed between the power supply unit and a substrate (e.g., motherboard) on which the component is mounted, and is electrically connected to at least one power supply line of the power supply cable and a…

MASS STORAGE SYSTEMS AND METHODS USING SOLID-STATE STORAGE MEDIA

Granted: June 7, 2012
Application Number: 20120144096
A mass storage system comprising multiple memory cards, each with non-volatile memory components, a system bus interface for communicating with a system bus of a host system, and at least one ancillary interface. The ancillary interface is configured for direct communication of commands, addresses and data between the memory cards via a cross-link connector without accessing the system bus interface.