Pixel Cell Having Anti-Blooming Structure and Image Sensor
Granted: September 28, 2023
Application Number:
20230307484
A pixel cell is formed on a semiconductor substrate having a front surface. The pixel cell includes a photodiode, a floating diffusion region, and a transfer gate. The photodiode is disposed in the semiconductor substrate. The floating diffusion region includes a first doped region disposed in the semiconductor substrate, wherein the first doped region extends from the front surface to a first junction depth in the semiconductor substrate. The transfer gate is configured to selectively…
DUAL DEPTH JUNCTION STRUCTURES AND PROCESS METHODS
Granted: September 28, 2023
Application Number:
20230307474
Transistors, electronic devices, and methods are provided. Transistors include a gate trench formed in a semiconductor substrate and extending to a gate trench depth, and a source and a drain formed as doped regions in the semiconductor substrate and having a first conductive type. The source and the drain are formed along a channel length direction of the transistor at a first end and a second end of the gate trench, respectively, and the source and the drain each includes a first doped…
CENTRAL DEEP TRENCH ISOLATION SHIFT
Granted: August 24, 2023
Application Number:
20230268357
Image sensors include a pixel array arranged about an array center, each pixel of the pixel array having a photodiode formed in a semiconductor substrate, and a central deep trench isolation structure disposed in the semiconductor substrate relative to a pixel center between the photodiode and an illuminated surface of the semiconductor substrate. If the pixel center is not coincident with the array center, then the central deep trench isolation structure is disposed at a CDTI shift…
Alignment Method for Image Sensor Fabrication and Associated Semiconductor Device
Granted: August 3, 2023
Application Number:
20230245977
The present disclosure provides an alignment method for image sensor fabrication that involve forming a number of set of alignment marks using key process mask layers to improve alignment registration between process mask layers so as to reduce number of alignment transfer improves alignment accuracy between pixel elements. The present disclosure further provides a semiconductor device that includes such alignment mark structures.
BURIED CHANNEL TRANSISTOR STRUCTURES AND PROCESSES
Granted: July 13, 2023
Application Number:
20230223413
Transistors include trenches formed in the semiconductor substrate having a first conductive type. The trenches define, in a channel width plane of the transistor, at least one nonplanar substrate structure having a plurality of sidewall portions and a tip portion disposed between the plurality of sidewall portions. An epitaxial overlayer is epitaxially grown on the sidewall portions and the tip portion. A channel doping layer having a doped portion of the semiconductor substrate is…
VERTICAL TRANSFER STRUCTURES
Granted: July 6, 2023
Application Number:
20230215900
Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart…
Image Sensor for Infrared Sensing and Fabrication Thereof
Granted: July 6, 2023
Application Number:
20230215887
The invention disclose a pixel in an image sensor capable of detecting infrared light and associated fabrication method. The image sensor includes a semiconductor substrate has a first photodiode and a second photodiode adjacent to the first photodiode. A planarized dielectric layer having a recessed region is disposed on a first side of the semiconductor substrate. A first color filter disposed on the planarized dielectric layer aligned with the first photodiode and configured to…
TRANSISTORS HAVING INCREASED EFFECTIVE CHANNEL WIDTH
Granted: June 29, 2023
Application Number:
20230207587
An image sensor includes a photodiode disposed in a semiconductor substrate having a first surface and a second surface opposite to the first surface. A floating diffusion is disposed in the semiconductor substrate. A transfer transistor is configured for coupling the photodiode to the floating diffusion. The transfer transistor includes a vertical transfer gate extending a first depth in a depthwise direction from the first surface into the semiconductor substrate. A transistor is…
CMOS Image Sensor Pixel for High Dynamic Range Capturing
Granted: June 29, 2023
Application Number:
20230207584
An image sensor element includes a transfer transistor TX, a LOFIC select transistor LF, a photodiode PD, and a first overflow path OFP. The transfer transistor TX outputs a readout signal from a first end. The LOFIC select transistor LF includes a first end connected to a second end of the transfer transistor TX, and a second end connected to a capacitor. The photodiode PD is connected in common to a third end of the transfer transistor and a third end of the LOFIC select transistor LF.…
Image Sensor and Method for Reading Out Signal of Image Sensor
Granted: June 22, 2023
Application Number:
20230199341
An image sensor includes a plurality of pixels that is arranged in a matrix and each of which outputs a signal in response to incident light, wherein readout of data can be performed with respect to the plurality of pixels, and simultaneous readout of data of a plurality of columns of pixels can be performed, and at least one pixel of the plurality of columns of pixels to be read simultaneously can be read for phase detection with respect to each of divided sub-pixels. The image sensor…
Differential Subrange ADC for Image Sensor
Granted: June 8, 2023
Application Number:
20230179889
A differential subrange analog-to-digital converter (ADC) converts differential analog image signals received from sample and hold circuits to a digital signal through an ADC comparator. The comparator of the differential subrange ADC is shared by a successive approximation register (SAR) ADC coupled to provide both M upper output bits (UOB) and a ramp ADC coupled to provide N lower output bits (LOB). Digital-to-analog converters (DACs) of the differential subrange SAR ADC comprises 2M…
DAM OF IMAGE SENSOR MODULE HAVING SAWTOOTH PATTERN AND INCLINED SURFACE ON ITS INNER WALL AND METHOD OF MAKING SAME
Granted: March 9, 2023
Application Number:
20230076598
An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing…
IMAGE SENSOR WITH VARYING DEPTH DEEP TRENCH ISOLATION STRUCTURE FOR REDUCED CROSSTALK
Granted: March 2, 2023
Application Number:
20230067975
An image sensor comprises a first photodiode, a second photodiode, and a deep trench isolation structure. The first photodiode and the second photodiode are each disposed within a semiconductor substrate. The first photodiode is adjacent to the second photodiode. The deep trench isolation structure has a varying depth disposed within the semiconductor substrate between the first photodiode and the second photodiode. The DTI structure extends the varying depth from a first side of the…
REFERENCE CLOCK COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR (CMOS) INPUT BUFFER WITH SELF-CALIBRATION AND IMPROVED ELECTROSTATIC DISCHARGE (ESD) PERFORMANCE
Granted: March 2, 2023
Application Number:
20230062619
Reference clock CMOS input buffer with self-calibration and improved ESD performance. In one embodiment, a reference clock input buffer of an image sensor includes a Schmitt trigger configured to generate a clock signal having a falling edge and a rising edge. The falling edge and the rising edge are separated by a hysteresis voltage. The Schmitt trigger includes a plurality of output switches and a plurality of voltage control switches that are individually coupled to individual output…
High Dynamic Range Image Sensor Having Reduced Crosstalk and Jaggy
Granted: January 12, 2023
Application Number:
20230010935
An image sensor has a plurality of pixels arranged in a row direction and in a column direction. Each pixel comprises a color filter that has a portion with a low transmissivity and a portion with a high transmissivity, and a photoelectric conversion element that includes a first photoelectric conversion cell which receives light transmitting through the portion with the low transmissivity of the color filter, and a second photoelectric conversion cell which receives light transmitting…
High Dynamic Range Image Sensor Having Reduced Crosstalk and Jaggy
Granted: January 12, 2023
Application Number:
20230010935
An image sensor has a plurality of pixels arranged in a row direction and in a column direction. Each pixel comprises a color filter that has a portion with a low transmissivity and a portion with a high transmissivity, and a photoelectric conversion element that includes a first photoelectric conversion cell which receives light transmitting through the portion with the low transmissivity of the color filter, and a second photoelectric conversion cell which receives light transmitting…
UNIFORM THRESHOLD VOLTAGE NON-PLANAR TRANSISTORS
Granted: November 24, 2022
Application Number:
20220376069
Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.
PYRAMID-SHAPED TRANSISTORS
Granted: November 24, 2022
Application Number:
20220376068
Transistors include a pyramid-shaped gate trench defined by a triangular shape or a trapezoidal shape in a channel width plane and a trapezoidal shape in a channel length plane. Side wall portions of the pyramid-shaped gate trench form a channel having a triangular shape or a trapezoidal shape in the channel width plane. Advantageously, such transistors increase transconductance without increasing pixel width. Devices, image sensors, and pixels incorporating such transistors are also…
UNIFORM THRESHOLD VOLTAGE NON-PLANAR TRANSISTORS
Granted: November 24, 2022
Application Number:
20220375977
Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.
FULLY BURIED COLOR FILTER ARRAY OF IMAGE SENSOR
Granted: April 14, 2022
Application Number:
20220116516
An image sensor includes a substrate. An array of photodiodes is disposed in the substrate. A plurality of spacers is arranged in a spacer pattern. At least one spacer of the plurality of spacers has an aspect ratio of 18:1 or greater. A buffer layer is disposed between the substrate and the spacer pattern. An array of color filters is disposed in the spacer pattern.
