Sandisk Patent Applications

Systems and Methods for Sampling Data at a Non-Volatile Memory System

Granted: April 20, 2017
Application Number: 20170109040
Systems and methods for sampling data at a non-volatile memory system are disclosed. In one implementation, a controller of a non-volatile memory system that is coupled with a host device acquires a read level voltage of a first word line of a memory block of a non-volatile memory of the non-volatile memory system. The controller accesses one or more lookup tables to determine an offset voltage for a second word line of the memory block based on a program/erase count and a read/disturb…

Memory System and Method for Increasing Read Parallelism of Translation Pages

Granted: April 20, 2017
Application Number: 20170109078
A memory system and method are provided for increasing read parallelism of translation pages. In one embodiment, a memory system is provided comprising a plurality of memory dies, where each memory die is configured with storage space for a portion of a logical-to-physical address map that is distributed among the plurality of memory dies. The memory system also comprises a controller in communication with the plurality of memory dies and configured to receive a plurality of requests to…

Independent Sense Amplifier Addressing And Quota Sharing In Non-Volatile Memory

Granted: April 20, 2017
Application Number: 20170110189
Independent sense amplifier addressing provides separate column addresses to individual sense amplifier groups within a single bay during one column address cycle. A memory system determines whether the individual memory cells or bits of a column at a bay can be skipped. For each sense amplifier group having at least one memory cell (or bit) that needs to be programmed, the system determines for the first column address whether the memory cell can be skipped. If a bit or memory cell…

SEMICONDUCTOR DEVICE INCLUDING ELECTROMAGNETIC ABSORPTION AND SHIELDING

Granted: April 20, 2017
Application Number: 20170110383
A semiconductor device is disclosed including material for absorbing EMI and/or RFI. The device includes a substrate, one or more semiconductor die, and molding compound around the one or more semiconductor die. The material for absorbing EMI and/or RFI may be provided within or on a solder mask layer on the substrate, or within a dielectric core of the substrate. The device may further include EMI/RFI-absorbing material around the molding compound and in contact with the…

VOLTAGE LEVEL DETECTION AND ANALOG CIRCUIT ARRANGEMENTS FOR MEMORY SYSTEMS

Granted: April 13, 2017
Application Number: 20170102754
An apparatus may include detection circuitry configured to detect a presence of a host clock signal on a host clock line, and detect a level of a host supply voltage upon detection of the host clock signal. The detection circuitry may configure a core regulator in a regulation mode or in a bypass mode based on the detected level of the host supply voltage. Additionally, components of analog circuitry of a non-volatile memory system may be partitioned into different supply voltage…

Systems and Methods for Performing an Adaptive Sustain Write in a Memory System

Granted: April 13, 2017
Application Number: 20170102877
Systems and methods for performing an adaptive sustain write are disclosed. In one implementation, a controller of a non-volatile memory that is coupled with a host system monitors a rate at which the host system sends user data to the non-volatile memory system for storage and determines that the rate at which the host system sends user data to the non-volatile memory system for storage exceeds a threshold. The controller stores a first portion of the user data in one or more user…

Memory System and Method for Writing Data to a Block of an Erased Page

Granted: April 13, 2017
Application Number: 20170103025
In one embodiment, a memory system stores data encrypted with a cipher key in a block of a page in non-volatile memory, reads the cipher key version number associated with the page, determines whether the cipher key version number associated with the page is different from a cipher key version number of the cipher key used to encrypt the data and, if it is, writes a data pattern encrypted with the cipher key into the other blocks of the page, and stores the cipher key version number of…

Vertical Bit Line Non-Volatile Memory Systems And Methods Of Fabrication

Granted: April 6, 2017
Application Number: 20170098685
Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and methods of fabricating such a memory are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. The…

ZERO READ ON TRIMMED BLOCKS IN A NON-VOLATILE MEMORY SYSTEM

Granted: March 30, 2017
Application Number: 20170090815
A system and method is disclosed for providing zero data in response to a host data read directed to a logical address that is not associated with valid data. The system may be a non-volatile memory system including non-volatile memory and a controller configured to determine whether a logical address in a read command is associated with valid data. The controller may be configured to generate, store in non-volatile memory and retrieve from that non-volatile memory a zero data entry. The…

DYNAMIC RECONDITIONING OF CHARGE TRAPPED BASED MEMORY

Granted: March 23, 2017
Application Number: 20170083249
A storage device with a charge trapping (CT) based memory may include improved data retention (DR) performance. The CT memory may be 3D memory that uses a charge storage layer for storing charge may have unique data retention behavior. Memory blocks using a charge storage layer may be dynamically detected and reconditioned and re-programmed to improve memory characteristics, such as data retention. The reconditioning may include a dedicated erase cycle for a block that improves the data…

NON-VOLATILE MEMORY WITH SUPPLEMENTAL SELECT GATES

Granted: March 23, 2017
Application Number: 20170084345
A non-volatile memory system includes a plurality of groups of connected non-volatile memory cells (e.g., charge trapping memory cells), a select line, and a plurality of select gates connected to the select line. Each select gate is connected at an end (e.g. source end or drain side) of one of the groups of memory cells. The system includes one or more control circuits that are configured to determine whether the select gates are abnormal. If a select gate is determined to be abnormal,…

EXTENDING HARDWARE QUEUES WITH SOFTWARE QUEUES

Granted: March 16, 2017
Application Number: 20170075572
A storage device with a memory may implement software queueing that can supplement hardware accelerated queueing mechanisms. A software queue supplementing a hardware queue can extend the size and allow pending operations to proceed even if the hardware queue is saturated. The use of software-based queues may extend processing capacity in a hardware-accelerated front-end storage device architecture. The software queue may process excess commands that cannot be handled by a hardware queue…

SYSTEM AND METHOD FOR COUNTER FLUSH FREQUENCY

Granted: March 16, 2017
Application Number: 20170075593
Apparatus and method for determining when to save values of read counters are disclosed. Read counters store values that indicate the number of reads in respective blocks of a memory device. The values of the read counters may be stored in volatile memory, and may be periodically stored to non-volatile memory. The frequency at which the values of the read counters are stored to non-volatile memory may be dependent on the read disturb effect. One measure of the read disturb effect may be…

MULTIPLE SCHEDULING SCHEMES FOR HANDLING READ REQUESTS

Granted: March 16, 2017
Application Number: 20170075622
A non-volatile memory system may include a controller that issues data transfer commands to have data units associated with a host read request transferred from non-volatile memory to a temporary storage area before the data is sent to a host. The controller may be configured to generate a schedule that identifies when the data transfer commands are issued. The schedule may be generated according to one of a plurality of scheduling schemes, each with a different priority in having the…

PRESERVING READ LOOK AHEAD DATA IN AUXILIARY LATCHES

Granted: March 16, 2017
Application Number: 20170075629
A storage device utilizing read look ahead (RLA) may utilize auxiliary or spare latches as a RLA cache for storing pre-fetch data. The RLA may predict the next commands and do a speculative read to the flash using the latches for RLA storage. The auxiliary/spare latches may be present on a plane or die of non-volatile memory and may be different from the transfer data latch (XDL) that transfers data from the memory and the host. When the XDL is backed up, sense commands may still be…

Verify Operations Using Different Sense Node Voltages In A Memory Device

Granted: March 16, 2017
Application Number: 20170076812
Sense circuits in a memory device can be pre-charged to different levels in a sensing process to reduce the amount of time used for sensing. For example, in a program operation, a memory cell is in a fast programming mode until its threshold voltage exceeds an offset verify voltage (VO) of a data state. The offset verify voltage is below a final verify voltage (VF) of the data state. When the threshold voltage is between VO and VF, the memory cell is in a slow programming mode. A verify…

Storage Device and Method for Detecting and Handling Burst Operations

Granted: March 9, 2017
Application Number: 20170068451
A storage device and method for detecting and handling burst operations are provided. In one embodiment, a method for operating a storage device in burst mode is provided. The storage device senses a change in behavior of a host in communication with the storage device, determines whether the sensed change in behavior of the host is indicative of the host's need for the storage device to operate in burst mode by comparing the sensed change in behavior with prior changes in behavior that…

System and Method for File Detection and Usage During Compaction

Granted: March 9, 2017
Application Number: 20170068470
A non-volatile memory system may include a controller configured for parsing a host file system, identifying a location of a host file system directory and tracking directory entries of files deleted from the host file system directory but having valid data mappings in the logical-to-physical mapping table. The controller may then store the location of the host file system directory, monitor activity in the host file system directory and track validity status information for use in…

System and Method for Selectively Routing Cached Objects

Granted: March 9, 2017
Application Number: 20170068684
A monitoring application and method for using a monitoring application are disclosed. The monitoring application is configured to manage file system objects in a memory device layer (including copying of the file system objects) and is configured to manage one or more data structures to enable the management of the file system objects to be transparent to the application layer and/or the operating system layer.

Memory System and Method for Reducing Peak Current Consumption

Granted: March 2, 2017
Application Number: 20170060461
A memory system and method for reducing peak current consumption. In one embodiment, a method is provided that is performed in a memory system comprising a memory with a plurality of blocks, wherein each block has a peak current consumption. In this method, a plurality of metablocks is created, wherein each metablock is created by grouping together blocks with complementary peak current consumption. Next, the metablocks are programmed. Because each of the metablocks has blocks with…