MULTI-VIEW DISPLAY SYSTEM
Granted: February 2, 2012
Application Number:
20120026157
Embodiments of the invention are generally directed to a multi-view display system. An embodiment of an apparatus includes a display screen to display multiple views simultaneously, and a controller to control the views presented on the display screen. The apparatus is configurable by the controller to provide multiple view settings, the view settings including a first setting in which the apparatus provides a single view to each viewer of the display screen and a second setting in which…
EDGE DETECTION
Granted: October 13, 2011
Application Number:
20110249179
A technique for deinterlacing an interlaced video stream is disclosed. A embodiment of a method includes calculating a pixel using edge detection, calculating a pixel using vertical interpolation, calculating a pixel using weaving, calculating a confidence level, calculating a motion value, blending the edge pixel calculation with the vertical interpolation calculation to generate a first output pixel calculation, the blending being based on the confidence level, and blending the first…
ERROR DETECTION IN PHYSICAL INTERFACES FOR POINT-TO-POINT COMMUNICATIONS BETWEEN INTEGRATED CIRCUITS
Granted: August 25, 2011
Application Number:
20110209027
An apparatus, system and method for detecting errors in a physical interface during the transmission or receipt of data communications between integrated circuits (“ICs”) are disclosed. In one embodiment, a physical interface formed as a first IC on a first substrate portion to detect transmission errors in data exchanged with a second IC formed on a second substrate portion, the physical interface including multiple input ports and output ports, including a first subset of input…
DETERMINATION OF PHYSICAL CONNECTIVITY STATUS OF DEVICES BASED ON ELECTRICAL MEASUREMENT
Granted: August 11, 2011
Application Number:
20110193579
Embodiments of the invention are generally directed to determination of physical connectivity status of devices based on electrical measurement. An embodiment of a method includes discovering a connection of a first device with a second device, and performing an electrical measurement of the second device by the first device via the connection between the first device and the second device, where performing the electrical measurement includes sensing by the first device of an element of…
TRANSMISSION AND DETECTION OF MULTI-CHANNEL SIGNALS IN REDUCED CHANNEL FORMAT
Granted: July 14, 2011
Application Number:
20110170011
Embodiments of the invention are generally directed to transmission and detection of multi-channel signals in reduced channel format. An embodiment of a method for transmitting data includes determining whether a first type or a second type of content data is to be transmitted, where the first type of content data is to be transmitted at a first multiple of a base frequency and the second type of data is to be transmitted at a second multiple of the base frequency. The method further…
TRANSMISSION AND HANDLING OF THREE-DIMENSIONAL VIDEO CONTENT
Granted: June 23, 2011
Application Number:
20110149032
Embodiments of the invention are generally directed to transmission and handling of three-dimensional video content. An embodiment of a method includes receiving a multimedia data stream including video data utilizing an interface protocol and determining that the received video data includes three-dimensional (3D) video data, where each frame of the video data includes a first vertical synchronization (Vsync) signal prior to an active data region, the active data region including a…
DE-ENCAPSULATION OF DATA STREAMS INTO MULTIPLE LINKS
Granted: June 23, 2011
Application Number:
20110150006
Embodiments of the invention are generally directed to de-encapsulation of data streams into multiple links. An embodiment of a method includes receiving a data stream including multiple data frames, the data stream being in a first mode having a multiple channels of content data including a first channel sent in a first position in each data frame and a second channel sent in a second position in each data frame following the first position, with each data frame including a…
BI-DIRECTIONAL BRIDGE CIRCUIT HAVING HIGH COMMON MODE REJECTION AND HIGH INPUT SENSITIVITY
Granted: June 10, 2010
Application Number:
20100142419
A bidirectional communications interface is provided that connects a transmitter and a receiver, or a transceiver, to a transmission line. Under an embodiment, the bidirectional interface generates positive and negative polarity data signals using two separate differential amplifiers that receive differential signal pairs from each side of a differential link to the transmission line and the transmitter. The bidirectional interface controls common mode rejection in each of the separate…
Method and System for Transmitting or Receiving N-Bit Video Data over a Serial Link
Granted: November 5, 2009
Application Number:
20090274218
A system including a receiver, a TMDS link (or other serial link), and a transmitter configured to transmit K-bit video words (typically, encoded 8-bit video words) over the link. In typical embodiments, the transmitter is configured to pack a sequence of N-bit video words, where N?K (e.g., N=10, 12, or 16, when K=8) into a sequence of K-bit fragments, encode the fragments, and transmit the encoded fragments. The transmitted data are indicative of a sequence of M-fragment groups, and the…
BANK SHARING AND REFRESH IN A SHARED MULTI-PORT MEMORY DEVICE
Granted: June 11, 2009
Application Number:
20090150621
A method and system for sharing banks of memory in a multi-port memory device between components is provided. The multi-port memory device includes multiple ports to which components of a system are attached, and multiple banks of memory within the multi-port memory device that are shared by each of the ports. A bank availability pin is added to each port for each bank of memory. The bank availability pin is signaled when the bank is available to a particular port and unsignaled when the…
POWER-SAVING CLOCKING TECHNIQUE
Granted: September 25, 2008
Application Number:
20080235526
A method and system for providing a clock signal having reduced power consumption is provided, called the hybrid clock system. The hybrid clock system uses a PLL for high-speed data transfers, but provides a power-saving mode for transferring data while consuming less power. In the normal mode, the hybrid clock system contains a reference clock that operates at a low frequency that drives a PLL. The PLL multiplies the reference clock frequency to a much higher frequency, and supplies the…
COMMUNICATIONS ARCHITECTURE FOR MEMORY-BASED DEVICES
Granted: May 29, 2008
Application Number:
20080126824
A serial communications architecture for communicating between hosts and data store devices. The Storage Link architecture is specially adapted to support communications between multiple hosts and storage devices via a switching network, such as a storage area network. The Storage Link architecture specifies various communications techniques that can be combined to reduce the overall cost and increase the overall performance of communications. The Storage Link architecture may provide…
Cable with Circuitry for Asserting Stored Cable Data or Other Information to an External Device or User
Granted: January 24, 2008
Application Number:
20080022023
A cable including circuitry for asserting information to a user or external device and a system including such a cable. The cable can include conductors, a memory storing cable data, and circuitry configured to respond to a request received on at least one of the conductors by accessing at least some of the cable data and asserting the accessed data serially to at least one of the conductors (e.g., for transmission to an external device). Other aspects of the invention are methods for…
MULTI-PORT MEMORY DEVICE HAVING VARIABLE PORT SPEEDS
Granted: October 18, 2007
Application Number:
20070245094
A multi-port memory device having two or more ports wherein each port may operate at a different speed. The multi-port memory device contains memory banks that may be accessed via the two or more ports. Two clock signals are applied to each port: a system clock and a port clock. The system clock is applied to port logic that interfaces with the memory banks so that the ports all operate at a common speed with respect to the memory banks. The port clock is applied to a clock divider…
SHARED NONVOLATILE MEMORY ARCHITECTURE
Granted: October 4, 2007
Application Number:
20070233938
A method and system that utilizes a shared nonvolatile memory for initializing multiple processing components in a device. The startup logic and configuration data for processing components within a device is stored in a single nonvolatile memory. Upon receipt of a command to initialize the device, the shared memory system copies the startup logic and configuration data from the nonvolatile memory to a volatile main memory. Then, each processing component accesses the main memory to find…
INTER-PORT COMMUNICATION IN A MULTI-PORT MEMORY DEVICE
Granted: October 4, 2007
Application Number:
20070234021
A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e.g., a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer…
