Circuit board with bridge chiplets
Granted: March 15, 2022
Patent Number:
11277922
Various circuit boards and methods of fabricating and using the same are disclosed. In one aspect, a system is provided that has a circuit board with a pocket and a conductor layer. A chiplet is positioned in the pocket. The chiplet has plural bottom side interconnects electrically connected to the conductor layer and plural top side interconnects adapted to interconnect with two or more semiconductor chips.
Merged data path for triangle and box intersection test in ray tracing
Granted: March 15, 2022
Patent Number:
11276223
Described herein is a merged data path unit that has elements that are configurable to switch between different instruction types. The merged data path unit is a pipelined unit that has multiple stages. Between different stages lie multiplexor layers that are configurable to route data from functional blocks of a prior stage to a subsequent stage. The manner in which the multiplexor layers are configured for a particular stage is based on the instruction type executed at that stage. In…
Content adaptive lens shading correction method and apparatus
Granted: March 8, 2022
Patent Number:
11272146
Methods and apparatus for providing adaptive lens shading correction in at least a portion of a shaded image frame perform luminance lens shading correction for a portion of the shaded image frame and detect a color flat area in the shaded image. The methods and apparatus generate a frequency-based color shading profile that includes color shading parameters including an amplitude parameter and phase parameter corresponding to hue distributions from experimental shading data and generate…
Event guard for excessive virtual machine requests
Granted: March 8, 2022
Patent Number:
11269672
A processing system detects excessive requests sent on behalf of a virtual machine executing at the processing system within a predetermined period of time and denies subsequent requests sent on behalf of that virtual machine until after the predetermined period of time has elapsed in order to grant access to resources of the processing system for servicing requests from other virtual machines and to prevent a virtual machine that has been compromised by an attack from overwhelming the…
Command throughput in PIM-enabled memory using available data bus bandwidth
Granted: March 1, 2022
Patent Number:
11262949
An approach is provided for reducing command bus traffic between memory controllers and PIM-enabled memory modules using special PIM commands. The term “special PIM command” is used herein to describe embodiments and refers to a PIM command for which the corresponding module-specific command information is provided to memory modules via a non-command bus data path. A memory controller generates and issues a special PIM command to multiple PIM-enabled memory modules via a command bus…
Reference free and temperature independent voltage-to-digital converter
Granted: March 1, 2022
Patent Number:
11264998
A system and method for measuring power supply variations are described. A functional unit includes one or more power supply monitors capable of measuring power supply variations. The power supply monitors forego use of a clock signal from clock generating circuitry and forego use of a reference voltage from a reference power supply. The power supply monitors use an output of a source ring oscillator as a clock signal for the sequential elements of a counter. The counter measures a…
Integrated circuit memory with built-in self-test (BIST)
Granted: March 1, 2022
Patent Number:
11264115
An integrated circuit includes a memory core and a built-in self-test (BIST) controller. The memory core has an array of memory cells located at intersections of a plurality of word lines and a plurality of bit line pairs. The BIST controller is coupled to the memory core and has a mission mode and a built-in self-test mode. When in the mission mode, the BIST controller performs read and write accesses using precharge on demand. When in the built-in self-test mode, the BIST controller…
Voltage regulation system for memory bit cells
Granted: March 1, 2022
Patent Number:
11264060
Systems, apparatuses, and methods for dynamically generating a memory bitcell supply voltage rail from a logic supply voltage rail are disclosed. A circuit includes at least one or more comparators, control logic, and power stage circuitry. The circuit receives a logic supply voltage rail and compares the logic supply voltage rail to threshold voltage(s) using the comparator(s). Comparison signal(s) from the comparator(s) are coupled to the control logic. The control logic generates mode…
Workload-based clock adjustment at a processing unit
Granted: March 1, 2022
Patent Number:
11263044
A graphics processing unit (GPU) adjusts a frequency of clock based on identifying a program thread executing at the processing unit, wherein the program thread is detected based on a workload to be executed. By adjusting the clock frequency based on the identified program thread, the processing unit adapts to different processing demands of different program threads. Further, by identifying the program thread based on workload, the processing unit adapts the clock frequency based on…
Automatic generation of efficient vector code with low overhead in a time-efficient manner independent of vector width
Granted: March 1, 2022
Patent Number:
11262989
A computing system includes a compatibility graph builder to generate a compatibility graph based on a dependency graph representing program source code, where the compatibility graph indicates compatibility relationships between operations represented in the dependency graph, a clique generator coupled with the compatibility graph builder to generate a set of candidate vector packings based on the compatibility relationships indicated in the compatibility graph, a set cover generator…
Automatic memory overclocking
Granted: March 1, 2022
Patent Number:
11262924
Automatic memory overclocking, including: increasing a memory frequency setting for a memory module until a memory stability test fails; determining an overclocked memory frequency setting including a highest memory frequency setting passing the memory stability test; and generating a profile including the overclocked memory frequency setting.
Data output rate with variable rate shading
Granted: February 22, 2022
Patent Number:
11257273
Techniques for processing pixel data are provided. The techniques include, in a first mode in which blending is enabled, reading in render target color data from a memory system; blending the render target color data with one or more fragments received from a pixel shader stage to generate blended color data; outputting the blended color data to the memory system utilizing a first amount of bandwidth; in a second mode in which blending is disabled and variable rate shading is enabled,…
Loader and runtime operations for heterogeneous code objects
Granted: February 22, 2022
Patent Number:
11256522
Described herein are techniques for executing a heterogeneous code object executable. According to the techniques, a loader identifies a first memory appropriate for loading a first architecture-specific portion of the heterogeneous code object executable, wherein the first architecture specific portion includes instructions for a first architecture, identifies a second memory appropriate for loading a second architecture-specific portion of the heterogeneous code object executable,…
Using loop exit prediction to accelerate or suppress loop mode of a processor
Granted: February 22, 2022
Patent Number:
11256505
A processor predicts a number of loop iterations associated with a set of loop instructions. In response to the predicted number of loop iterations exceeding a first loop iteration threshold, the set of loop instructions are executed in a loop mode that includes placing at least one component of an instruction pipeline of the processor in a low-power mode or state and executing the set of loop instructions from a loop buffer. In response to the predicted number of loop iterations being…
Exploiting camera depth information for video encoding
Granted: February 15, 2022
Patent Number:
11252430
The present disclosure is directed a system and method for exploiting camera and depth information associated with rendered video frames, such as those rendered by a server operating as part of a cloud gaming service, to more efficiently encode the rendered video frames for transmission over a network. The method and system of the present disclosure can be used in a server operating in a cloud gaming service to improve, for example, the amount of latency, downstream bandwidth, and/or…
Performance for GPU exceptions
Granted: February 15, 2022
Patent Number:
11249765
Techniques for improving performance of accelerated processing devices (“APDs”) when exceptions occur are provided. In APDs, the very large number of parallel processing execution units, and the complexity of the hardware used to execute a large number of work-items in parallel, means that APDs typically stall when an exception occurs (unlike in central processing units (“CPUs”), which are able to execute speculatively and out-of-order). However, the techniques provided herein…
Multi-version shaders
Granted: February 8, 2022
Patent Number:
11243752
Described herein are techniques for generating a stitched shader program. The techniques include identifying a set of shader programs to include in the stitched shader program, wherein the set includes at least one multiversion shader program that includes a first version of instructions and a second version of instructions, wherein the first version of instructions uses a first number of resources that is different than a second number of resources used by the second version of…
System and method for scheduling instructions in a multithread SIMD architecture with a fixed number of registers
Granted: February 8, 2022
Patent Number:
11243904
A method and apparatus for scheduling instructions of a shader program for a graphics processing unit (GPU) with a fixed number of registers. The method and apparatus include computing, via a processing unit (PU), a liveness-based register usage across all basic blocks in the shader program, computing, via the PU, the range of numbers of waves of a plurality of registers for the shader program, assessing the impact of available post-register allocation optimizations, computing, via the…
Control flow guided lock address prefetch and filtering
Granted: February 8, 2022
Patent Number:
11243884
A method of prefetching target data includes, in response to detecting a lock-prefixed instruction for execution in a processor, determining a predicted target memory location for the lock-prefixed instruction based on control flow information associating the lock-prefixed instruction with the predicted target memory location. Target data is prefetched from the predicted target memory location to a cache coupled with the processor, and after completion of the prefetching, the…
Adaptive world switching
Granted: February 8, 2022
Patent Number:
11243799
An apparatus includes a plurality of virtual machines, a hypervisor coupled to the plurality of virtual machines, and a graphical processing unit (GPU) coupled to the hypervisor. The plurality of virtual machines are allocated a plurality of time slices. The hypervisor initiates a world switch to a first virtual machine of the plurality of virtual machines. The GPU makes a determination as to whether to adjust the time slice associated with the first virtual machine based on an…
