Demodulation and regulation concept for IR receivers
Granted: September 1, 2009
Patent Number:
7583944
A method and circuit for amplifying and demodulating amplitude-modulated signals is disclosed that amplifies a primary signal into an amplified signal, bandpass filters the amplified signal into a filtered signal, compares the filtered signal with a regulation threshold and regulates the gain of the primary signal such that peak values of the filtered signal approach the regulation threshold, compares the filtered signal with a signal threshold, and demodulates the result of the…
Charge pump for generation of multiple output-voltage levels
Granted: August 25, 2009
Patent Number:
7579902
A charge pump circuit for generating a plurality of voltages in excess of a supply voltage includes a first group of cascaded charge-pump stages, the input of a first charge pump stage in the first group being driven from the supply voltage. A first output stage has an input driven from the output of a last charge pump stage of the first group and an output coupled to a first voltage node. A second group of cascaded charge-pump stages is provided, the input of the first charge pump stage…
Data register with efficient erase, program verify, and direct bit-line memory access features
Granted: August 25, 2009
Patent Number:
7580291
A programmable memory device circuit comprising a sense and programming circuit, a latch circuit, a verify circuit for coupling the latch circuit logic value to a shared indicator line, and a direct memory access circuit coupled to the verify circuit. The DMA circuit couples a bit line to the verify circuit, and the verify circuit couples the direct memory access circuit to a shared verify indicator and DMA line.
Successive approximation analog/digital converter and associated integrated component and conversion method
Granted: August 18, 2009
Patent Number:
7576678
A successive approximation analog/digital converter is provided, which includes a successive approximation register supplying a digital/analog converter, first means of comparing an input signal of the analog/digital converter to an output signal of the digital/analog converter delivering a first comparison signal, said successive approximation analog/digital converter being synchronised by a clock signal coming from a conversion clock. A method such as this includes dynamic adaptation…
Column leakage compensation in a sensing circuit
Granted: August 11, 2009
Patent Number:
7573748
A sensing circuit. In one embodiment, the sensing circuit includes a memory circuit including a first bitline that sinks a first leakage current, a compensation device coupled to the memory circuit, and a compensation circuit coupled to the compensation device. The compensation circuit includes a second bitline that sinks a second leakage current that matches the first leakage current. The compensation device is operative to compensate the first leakage current through a current based on…
Method and device for detecting occupation by a signal of an adjacent channel
Granted: August 11, 2009
Patent Number:
7574184
A method for detecting occupation of an adjacent channel by a signal with the aid of a complex-valued bandpass signal having an information channel component and/or an adjacent channel component. In accordance with the invention, a) a real-valued bandpass signal is derived in that the complex-valued bandpass signal is filtered and the real component is produced from the filtered signal, b) the real-valued bandpass signal is transposed into a first baseband signal, c) the first baseband…
Command decoder for microcontroller based flash memory digital controller system
Granted: August 11, 2009
Patent Number:
7574611
A command decoder used for a microcontroller based Flash memory digital controller system includes multiple subsystems, including the command decoder, which serves as the main user interface for interpreting commands from a user and managing the priority of commands and command modes. The command decoder also stores crucial information including address, data, opcodes, and various flags registers that are used by other subsystems including the program buffer, burst read module, register…
Noise immune RC trigger for ESD protection
Granted: August 4, 2009
Patent Number:
7570468
An ESD protection circuit incorporates an ESD shunt device triggered by an ESD trigger network. In non-powered situations, a first RC time constant in the ESD trigger network, corresponds with the time range of the onset an ESD event and controls application of the ESD shunt device in response to the ESD event. A second RC time constant in a shunt trigger network is selected to be longer than the first RC time constant and holds-off triggering of a shunt device during ESD shunt…
Method and system for program pulse generation during programming of nonvolatile electronic devices
Granted: August 4, 2009
Patent Number:
7570519
Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a…
Common mode management between a current-steering DAC and transconductance filter in a transmission system
Granted: August 4, 2009
Patent Number:
7570188
Common mode management between a DAC, such as a current-steering DAC, and a transconductance filter in a high-frequency transmission system. In one aspect of the invention, a transmission circuit includes a DAC that provides an analog signal from an input digital signal, and a filter such as a transconductance filter connected to the DAC, the filter receiving the analog signal and filtering the analog signal for transmission. A common mode management circuit connected to the DAC and the…
Boron etch-stop layer and methods related thereto
Granted: August 4, 2009
Patent Number:
7569913
A method for forming an etch-stop layer and a resulting structure fabricated therefrom. The etch-stop layer has a semiconductor layer having a first surface and a boron layer formed below the first surface of the semiconductor layer. The boron layer has a full-width half-maximum (FWHM) thickness value of less than 100 nanometers. The boron layer is formed by a chemical vapor deposition (CVD) system.
Non-thermally annealed doped semiconductor material and methods related thereto
Granted: August 4, 2009
Patent Number:
7569458
A method of non-thermal annealing of a silicon wafer comprising irradiating a doped silicon wafer with electromagnetic radiation in a wavelength or frequency range coinciding with lattice phonon frequencies of the doped semiconductor material. The wafer is annealed in an apparatus including a cavity and a radiation source of a wavelength ranging from 10-25 ?m and more particularly 15-18 ?m, or a frequency ranging from 12-30 THz and more particularly 16.5-20 THz.
Multi-threshold reset circuit
Granted: July 28, 2009
Patent Number:
7567098
A device can include one or more circuits that are configured to be powered by a supply voltage having a specified minimum operating value and a specified nominal operating value; and a reset circuit having a first voltage threshold and a second voltage threshold, the first voltage threshold having a value between the specified minimum operating value and the specified nominal operating value, the second voltage threshold having a value that is less than the specified minimum operating…
Content addressable memory cell having a single floating gate transistor
Granted: July 28, 2009
Patent Number:
7567448
A method and system for providing a content addressable memory cell (CAM) as well as the CAM are disclosed. In one aspect, the method and system include providing a plurality of memory cells, at least one search line and at least one match line. Each of the CAM cells includes a FLOating gate Tunnel OXide (FLOTOX) element. The FLOTOX element includes a single floating gate transistor and a high voltage select transistor and can store at least a portion of a data word. Each CAM cell also…
Scribe based bond pads for integrated circuits
Granted: July 21, 2009
Patent Number:
7563694
A method and system for utilizing a semiconductor wafer is disclosed. The wafer comprises a plurality of semiconductor die and a plurality of scribe areas interspersed between. The method and system comprises forming bond out pads in the scribe areas such that the bond out pads are disposed on the semiconductor wafer between the plurality of semiconductor die. Additionally, the method and system comprises separating the semiconductor wafer into individual die such that when the…
Stackable integrated circuit structures and systems devices and methods related thereto
Granted: July 21, 2009
Patent Number:
7564137
An apparatus and a method for packaging semiconductor devices. The apparatus is a three-dimensional electronic package comprising one or more electronic components, a plurality of electrical contact pads, and a plurality of electrically conductive three-dimensional plugs formed through an encapsulant. Specific ones of the plurality of electrical contact pads are electrically coupled to the one or more electronic components on an uppermost surface of the plurality of electrical contact…
Current compensation for digital-to-analog converter
Granted: July 21, 2009
Patent Number:
7564385
A current compensation circuit and an optimized current compensation circuit are disclosed for a Parallel Resistors Architecture (PRA) digital-to-analog converter (DAC). The circuits are used to balance code dependent current consumption of the PRA-DAC.
Process and electronic decoding circuit for a diphase asynchronous frame whose length is not known in advance, corresponding application, computer programme and storage means
Granted: July 21, 2009
Patent Number:
7564936
A decoding process, by an electronic circuit of a diphase asynchronous frame carried by an encoded data signal and comprising L information bits followed by at least one stop bit. The process comprises a step for automatically detecting the length L in information bits of the frame so as to decode the entire frame, the length L of the frame being variable from one frame to another and such that Lmin?L?Lmax=(Lmin+k), where k is a predetermined whole number greater than or equal to one.
Method and system for incorporating high voltage devices in an EEPROM
Granted: July 14, 2009
Patent Number:
7560334
A method and system for fabricating a stacked capacitor and a DMOS transistor are disclosed. In one aspect, the method and system include providing a bottom plate, an insulator, and an additional layer including first and second plates. The insulator covers at least a portion of the bottom plate and resides between the first and second top plates and the bottom plate. The first and second top plates are electrically coupled through the bottom plate. In another aspect, the method and…
Matrix image recorder with image sensor and a plurality of row conductors
Granted: July 14, 2009
Patent Number:
7561197
The invention relates to matrix image sensors intended in particular for digital photography. The invention provides a driver in each pixel that allows exposure control common to the entire matrix. The driver comprises five transistors, a photodiode and, apart from a supply conductor and a ground, four control conductors, these being an exposure control conductor common to all the pixels of the matrix; a row selection conductor common to all the pixels of any one row; a reset conductor…
