Tilted printed circuit board installation
Granted: July 2, 2013
Patent Number:
8477508
A blade for a chassis-based system includes a printed circuit board (PCB) mounted at a tilt angle within the blade. The tilt angle provides space above or below the PCB at the front end of the blade, such that media interface modules can be flexibly positioned within the blade. A tilt angle that positions the PCB higher near the front end of the blade may enable media interface modules mounted in a belly-to-belly configuration on the PCB to be fitted within the front end of the blade. A…
Method and system for link aggregation across multiple switches
Granted: May 21, 2013
Patent Number:
8446914
One embodiment of the present invention provides a switch. The switch includes a forwarding mechanism and a control mechanism. During operation, the forwarding mechanism forwards frames based on their Ethernet headers. The control mechanism operates the switch in conjunction with a separate physical switch as a single logical switch and assigns a virtual switch identifier to the logical switch, wherein the virtual switch identifier is associated with a link aggregation group.
Multifabric zone device import and export
Granted: May 21, 2013
Patent Number:
8446913
A Fibre Channel router used to join fabrics. EX_ports are used to connect to the fabrics. The EX_port joins the fabric but the router will not merge into the fabric. Ports in the Fibre Channel router can be in a fabric, but other ports can be connected to other fabrics. Fibre Channel routers can be interconnected using a backbone fabric. Global, interfabric and encapsulation headers are developed to allow routing by conventional Fibre Channel switch devices in the backbone fabric and…
Dynamic latency-based rerouting
Granted: April 23, 2013
Patent Number:
8427958
A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating…
Separate memories and address busses to store data and signature
Granted: April 2, 2013
Patent Number:
8413018
A programmable device employs an address and data corruption logic for data written to a first memory. A first signature is computed from the data stored in the first memory and stored in a second memory. When data is read from the first memory, the first signature stored in the second memory is read and compared with a second signature computed from the data read from the first memory. If the first and second signatures do not match, an error condition is indicated.
Per priority TCP quality of service
Granted: April 2, 2013
Patent Number:
8412831
An IP gateway device establishes distinct TCP sessions within a single FCIP tunnel, each TCP session being designated for a different priority of service (e.g., high, medium, low), plus a control stream. Each TCP session has its own TCP stack and its own settings for VLAN Tagging (IEEE 802.1Q), quality of service (IEEE 802.1P) and Differentiated Services Code Point (DSCP). By distributing data streams assigned to different priorities of service into different TCP sessions within the FCIP…
Synchronization of multicast information using incremental updates
Granted: March 26, 2013
Patent Number:
8406125
Techniques that enable a network device such as a router to provide multicast routing services without interruption, even in the event of a switchover. An incremental updates technique is used to synchronize multicast information maintained by a first processor and multicast information maintained by a second processor. The first processor may be a management processor operating in active mode in a network device and the second processor may be a management processor operating in standby…
Interrupt moderation
Granted: March 12, 2013
Patent Number:
8397007
A technique for interrupt moderation allows coalescing interrupts from a device into groups to be processed as a batch by a host processor. Receive and send completions may be processed differently. When the host is interrupted for receive completions, it may check for send completions, reducing the need for interrupts related to send completions. Timers and a counter allow coalescing interrupts into a single interrupt that can be used to signal the host to process multiple completions.…
Deferred queuing in a buffered switch
Granted: February 19, 2013
Patent Number:
8379658
A method and apparatus is disclosed for temporarily deferring transmission of frames to a destination in a data switch. When a request for transmission of a frame to the destination port is received, the congestion status of that destination is determined. If the destination is congested, the frame is stored in a deferred queue. When the status of a destination changes from congested to non-congested, the deferred queue is examined to see if any deferred frames can now be forwarded to…
Mechanism to change firmware in a high availability single processor system
Granted: February 12, 2013
Patent Number:
8375363
A “high availability” system comprises multiple switches under the control of a control processor (“CP”). The firmware executing on the processor can be changed when desired. Consistent with the high availability nature of the system (i.e., minimal down time), a single CP system implements a firmware change by loading new firmware onto the system, saving state information pertaining to the old firmware, preventing the old firmware from communicating with the switches, bringing…
Method and system for extending routing domain to non-routing end stations
Granted: February 5, 2013
Patent Number:
8369335
A system is provided for facilitating assignment of a virtual routing node identifier to a non-routing node. During operation, the system assigns to a non-routing node coupled to a switch a virtual routing node identifier unique to the non-routing node. In addition, the system communicates reachability information corresponding to the virtual routing node identifier to other switches in the network.
Data migration without interrupting host access and with data lock for write access requests such that held write access requests do not expire
Granted: December 25, 2012
Patent Number:
8341459
A system includes a source storage device, a target storage device, a host coupled to the source storage device and the target storage device, and a first migration device coupled to the source storage device and the target storage device. The first migration device includes a first virtual storage device. The first migration device is configured to migrate data from the source storage device to the target storage device, and the first virtual storage device is configured to receive…
User selectable multiple protocol network interface device
Granted: December 25, 2012
Patent Number:
8340120
An Ethernet/Fiber Channel network interface device which can be configured by a user to operate on an FC SAN, a CEE network or both. In one embodiment the configuration can be done using jumpers or connections to the pins of a chip, thus allowing a manufacturer to only inventory one device for use with either or both networks. In a second embodiment the configuration can be done in software by setting registers and memory values on the device. This embodiment allows the device to be…
Defining an optimal topology for a group of logical switches
Granted: December 25, 2012
Patent Number:
8339994
A Layer 2 network switch fabric is partitionable into a plurality of virtual fabrics. A network switch chassis is partitionable into a plurality of logical switches, each of which may be associated with one of the virtual fabrics, including a base switch. Logical switches in multiple network switch chassis are connected by logical connections, such as logical inter-switch links that use physical connections, such as extended inter-switch links between base switches, for data transport. A…
Multi-processor architecture implementing a serial switch and method of operating same
Granted: December 18, 2012
Patent Number:
8335884
A multi-processor architecture for a network device that includes a plurality of barrel cards, each including: a plurality of processors, a PCIe switch coupled to each of the plurality of processors, and packet processing logic coupled to the PCIe switch. The PCIe switch on each barrel card provides high speed flexible data paths for the transmission of incoming/outgoing packets to/from the processors on the barrel card. An external PCIe switch is commonly coupled to the PCIe switches on…
Cookie invalidation or expiration by a switch
Granted: December 4, 2012
Patent Number:
8327000
A switch may be used to force the expiration of a cookie on a user's system by inserting an expiration field into the cookie contained in a network response packet. Additionally, a mechanism is provided to delete or damage a cookie contained in a network request packet, so that server software is not disrupted by the receipt of a cookie. Deleting a cookie results in a cleaner request, but damaging a cookie may be more efficient in certain circumstances. By providing these features, an…
Fibre channel network employing registered state change notifications with enhanced payload
Granted: November 27, 2012
Patent Number:
8320241
A network of switches that employ Registered State Change Notifications (RSCNs) with enhanced payloads is disclosed. In one embodiment, the network comprises multiple switches coupled together, and multiple node devices each directly-coupled to at least one other switch. Each of the switches preferably provides RSCNs to other switches when a node device state change is detected. One or more of the RSCNs preferably includes a device entry having more than four properties associated with…
Topology database synchronization
Granted: November 20, 2012
Patent Number:
8315188
A network comprises a plurality of interconnected switches that implement a topology database synchronization technique in which each switch determines whether its topology database has already been transmitted to a neighboring switch when a new link is formed to the neighboring switch. When a new electrical connection is detected, the local switch determines whether any of its other ports have already been connected to the same neighboring switch. If no other port on the local switch…
Side-exhaust cooling system for rack mounted equipment
Granted: November 13, 2012
Patent Number:
8310832
A cooling system for rack mount electrical or electronic equipment comprises a hollow, box-shaped exhaust shelf having a vent on at least one end face thereof. The exhaust shelf may be configured for rack mounting. A side duct, open on its inner side, is mounted between the exhaust shelf and a top rail adapted to be mounted between a front post and an opposing rear post in a four-post rack mount enclosure. A plenum in the side duct is in fluid communication with the interior chamber of…
Scalable key archival
Granted: November 13, 2012
Patent Number:
8311225
A solution for scalable key archival includes, at a network device, determining whether a key management device that is not part of a current key management device configuration has been newly added to a network. The method also includes, if the key management device has been newly added to the network, determining whether the network device has a first application program interface (API) or device driver for communicating with the key management device. The method also includes, if the…
