PROGRAMMING A MULTI-PROCESSOR SYSTEM
Granted: September 11, 2014
Application Number:
20140258974
A computer-implemented method for creating a program for a multi-processor system comprising a plurality of interspersed processors and memories. A user may specify or create source code using a programming language. The source code specifies a plurality of tasks and communication of data among the plurality of tasks. However, the source code may not (and preferably is not required to) 1) explicitly specify which physical processor will execute each task and 2) explicitly specify which…
Parallel Execution of Trellis-Based Methods Using Overlapping Sub-Sequences
Granted: September 4, 2014
Application Number:
20140247910
A receiver system and method for recovering information from a symbol data sequence Y. The symbol data sequence Y corresponds to a symbol data sequence X that is transmitted onto the channel by a transmitter. The symbol data sequence X is generated by the transmitter based on associated information bits. At the receiver, a set of two or more processors operate in parallel on two or more overlapping subsequences of the symbol data sequence Y, where each of the two or more overlapping…
MODE-LOCKED OPTICALLY PUMPED SEMICONDUCTOR LASER
Granted: September 4, 2014
Application Number:
20140247842
A laser includes an optically pumped semiconductor OPS gain-structure. The apparatus has a laser-resonator which includes a mode-locking device for causing the laser to deliver mode-locked pulses. The resonator has a total length selected such that the mode-locked pulses are delivered at a pulse repetition frequency less than 150 MHz. An optical arrangement within the resonator provides that radiation circulating in the resonator makes a plurality of incidences on the OPS gain-structure…
SHORT-PULSED COMPACT MOPA
Granted: August 28, 2014
Application Number:
20140241386
A master oscillator power amplifier (MOPA) system includes an oscillator having a neodymium-doped gadolinium vanadate gain-medium and delivering seed-pulses. A length of single mode fiber is used to broaden the spectrum of the seed pulse. An amplifier having a neodymium-doped yttrium vanadate gain-medium amplifies the spectrally broadened seed-pulses. The gain-spectrum of the amplifier partially overlaps the broadened pulse-spectrum, providing spectral selection of the seed-pulses in…
VEHICLE NAVIGATION USING NON-GPS LEO SIGNALS AND ON-BOARD SENSORS
Granted: August 21, 2014
Application Number:
20140232592
A navigation system includes a navigation radio and a sensor onboard a vehicle. The navigation radio receives and processes low earth orbit RF signals to derive range observables for a corresponding LEO satellite. A sensor is operable to generate at least one of vehicle speed data, acceleration data, angular rate data and rotational angle data under high vehicle dynamics. The navigation radio includes a navigation code operable to obtain a position, velocity and time solution (a…
HIGH-GAIN FACE-PUMPED SLAB-AMPLIFIER
Granted: July 31, 2014
Application Number:
20140211301
An optical amplifier for use as a final amplification stage for a fiber-MOPA has a gain-element including a thin wafer or chip of ytterbium-doped YAG. An elongated gain-region is formed in gain-element by multiple incidences of radiation from a diode-laser bar.
SHORT-PULSE FIBER-LASER
Granted: July 24, 2014
Application Number:
20140204964
A mode-locked fiber laser has a resonator including a gain-fiber, a mode-locking element, and a spectrally-selective dispersion compensating device. The resonator can be a standing-wave resonator or a traveling-wave resonator. The dispersion compensating device includes only one diffraction grating combined with a lens and a mirror to provide a spatial spectral spread. The numerical aperture of the gain-fiber selects which portion of the spectral spread can oscillate in the resonator.
MULTIPROCESSOR SYSTEM WITH IMPROVED SECONDARY INTERCONNECTION NETWORK
Granted: June 19, 2014
Application Number:
20140173161
Embodiments of a multiprocessor system are disclosed that may include a plurality of processors interspersed with a plurality of data memory routers, a plurality of bus interface units, a bus control circuit, and a processor interface circuit. The data memory routers may be coupled together to form a primary interconnection network. The bus interface units and the bus control circuit may be coupled together in a daisy-chain fashion to form a secondary interconnection network. Each of the…
AUTOMATIC SELECTION OF ON-CHIP CLOCK IN SYNCHRONOUS DIGITAL SYSTEMS
Granted: June 19, 2014
Application Number:
20140173324
Embodiments of a synchronous digital system are disclosed that may include generation of clock and synchronization signals. Any of a plurality of available clock signals may be selected for use as a primary clock, without causing clock-induced errors in the synchronous digital system. A clock signal generated on-chip with the synchronous digital system may be automatically selected in response to detecting a condition indicating that use of a local clock may be necessary. Such conditions…
CLOCK DISTRIBUTION NETWORK FOR MULTI-FREQUENCY MULTI-PROCESSOR SYSTEMS
Granted: June 19, 2014
Application Number:
20140173321
Embodiments of a synchronous digital system are disclosed that may include generation of clock and synchronization signals. Any of a plurality of available clock signals may be selected for use as a primary clock, without causing clock-induced errors in the synchronous digital system. The clock signals may be selected automatically or programmatically. Clock generation circuitry may generate a clock signal that is initially used as the primary clock. The clock generation circuitry may be…
MACRO-CHANNEL WATER-COOLED HEAT-SINK FOR DIODE-LASER BARS
Granted: June 19, 2014
Application Number:
20140169394
A water-cooled heat-sink for a diode-laser bar includes a copper-cooling-unit having an integral mount thereon for the diode-laser bar. The copper-cooling-unit is attached to a steel base-unit. The base-unit and the cooling-unit are cooperatively configured such that at least one cooling-channel is formed in the cooling-unit by the attachment of the base-unit to the cooling-unit. The cooling-channel is positioned to cool the mount when cooling-water flows through the cooling-channel.
WAVELENGTH-STABILIZED MICROCRYSTAL LASER
Granted: June 19, 2014
Application Number:
20140169390
A microcrystal laser assembly including a gain-crystal includes a frame having a high thermal conductivity. The frame has a base with two spaced apart portions extending from the base. The gain-crystal has a resonator output minor on one surface thereof. The gain-crystal is supported on the spaced-apart portions of the frame in the space therebetween. Another resonator minor is supported in that space, spaced apart from the output mirror, on a pedestal attached to the base of the frame.…
MULTI-FREQUENCY CLOCK SKEW CONTROL FOR INTER-CHIP COMMUNICATION IN SYNCHRONOUS DIGITAL SYSTEMS
Granted: June 19, 2014
Application Number:
20140167825
Embodiments are disclosed of a multi-chip apparatus capable of performing multi-rate synchronous communication between component chips. Each chip may receive a common clock reference signal, and may generate an internal clock signal dependent on the clock reference signal. A clock distribution tree and phase-locked loop may be used to minimize internal clock skew at I/O circuitry at the chip perimeter. Each chip may also generate an internal synchronizing signal that is phase-aligned to…
PROCESSING SYSTEM WITH SYNCHRONIZATION INSTRUCTION
Granted: June 12, 2014
Application Number:
20140164735
Embodiments of a multi-processor array are disclosed that may include a plurality of processors, and controllers. Each processor may include a plurality of processor ports and a sync adapter. Each sync adapter may include a plurality of adapter ports. Each controller may include a plurality of controller ports, and a configuration port. The plurality of processors and the plurality of controllers may be coupled together in an interspersed arrangement, and the controllers may be distinct…
Processing System With Interspersed Processors With Multi-Layer Interconnect
Granted: May 22, 2014
Application Number:
20140143520
Embodiments of a multi-processor array are disclosed that may include a plurality of processors and configurable communication elements coupled together in a interspersed arrangement. Each configurable communication element may include a local memory and a plurality of routing engines. The local memory may be coupled to a subset of the plurality of processors. Each routing engine may be configured to receive one or more messages from a plurality of sources, assign each received message…
Processing System With Interspersed Processors DMA-FIFO
Granted: May 22, 2014
Application Number:
20140143470
Embodiments of a multi-processor array are disclosed that may include a plurality of processors, local memories, configurable communication elements, and direct memory access (DMA) engines, and a DMA controller. Each processor may be coupled to one of the local memories, and the plurality of processors, local memories, and configurable communication elements may be coupled together in an interspersed arrangement. The DMA controller may be configured to control the operation of the…
Real Time Analysis and Control for a Multiprocessor System
Granted: May 15, 2014
Application Number:
20140137082
System and method for testing a DUT that includes a multiprocessor array (MPA) executing application software at operational speed. The application software may be configured for deployment on first hardware resources of the MPA and may be analyzed. Testing code for configuring hardware resources on the MPA to duplicate data generated in the application software for testing purposes may be created. The application software may be deployed on the first hardware resources. Input data may…
Multiprocessor Programming Toolkit for Design Reuse
Granted: May 8, 2014
Application Number:
20140130013
Techniques for specifying and implementing a software application targeted for execution on a multiprocessor array (MPA). The MPA may include a plurality of processing elements, supporting memory, and a high bandwidth interconnection network (IN), communicatively coupling the plurality of processing elements and supporting memory. In one embodiment, software code may include first program instructions executable to perform a function. In this embodiment, the software code may also…
Low-Amplitude Echo Estimation for a Received Communication Signal
Granted: May 8, 2014
Application Number:
20140126624
A system and method for identifying minor echoes present in an input signal in the situation where a set of major echoes has already been identified from the input signal. The method includes: computing a spectrum F corresponding to a sum of the major echoes; computing a weighted power spectrum SM of the spectrum F; subtracting the weighted power spectrum SM from a weighted power spectrum PIN of the input signal to obtain a difference spectrum; performing a stabilized division of the…
MACRO-CHANNEL WATER-COOLED HEAT-SINK FOR DIODE-LASER BARS
Granted: May 1, 2014
Application Number:
20140119393
A diode-laser bar is mounted on water-cooled heat-sink between two ceramic sub-mounts for electrically isolating cooling-water in the heat-sink from the diode-laser bar. Mounting between the two ceramic sub-mounts also provides for balancing stresses due to differences in coefficient of thermal expansion (CTE) between the sub-mounts and the diode-laser bar. Both sub-mounts are in thermal communication with the heat-sink for providing two-sided cooling of the diode-laser bar.
