Method and Apparatus For Sensing the Force With Which a Button is Pressed
Granted: February 23, 2012
Application Number:
20120046104
An example method includes measuring a capacitance of an actuator and a conductive element when, responsive to a force applied to the actuator, the actuator is coupled to a reference voltage and deformed such that surface area of the actuator proximate to the conductive element increases. The example method includes determining the force applied to the actuator based on the measured capacitance.
APPARATUS AND METHODS FOR DETECTING A CONDUCTIVE OBJECT AT A LOCATION
Granted: February 23, 2012
Application Number:
20120044201
A method and apparatus to detect a conductive object at a location determines a capacitance variation of a first sensor element and a capacitance variation of a second sensor element. The method and apparatus detects a touch at a first location if the capacitance variation of the first sensor element is greater than a reference value and the capacitance variation of the second sensor element is not greater than the reference value. The method and apparatus detects the touch at a second…
Capacitance Scanning Proximity Detection
Granted: February 23, 2012
Application Number:
20120044199
A method and apparatus for scanning a first set of electrodes of a capacitive sense array using a first sensing mode to identify a presence of an object in proximity to the capacitive sense array, where scanning using the first sensing mode identifies objects not in physical contact with the capacitive sense array. The first set of electrodes is scanned using a second sensing mode to determine a location of the object in relation to the capacitive sense array, where rescanning using the…
MEMORY DEVICE AND METHOD
Granted: January 19, 2012
Application Number:
20120014202
A method of accessing a memory device multiple times in a same time period can include, in a first sequence of accesses, starting an access operation to one of a plurality of banks in synchronism with a first part of a first clock cycle and starting an access operation to another of the plurality of banks in synchronism with a second part of the first clock cycle, each bank having separate access circuits; and the time between consecutive accesses is faster than an access speed for…
MEMORY DEVICES AND METHODS HAVING MULTIPLE ADDRESS ACCESSES IN SAME CYCLE
Granted: January 12, 2012
Application Number:
20120008378
A memory device can include a plurality of banks, each bank including memory locations accessible by different access circuits; at least a first address port configured to receive addresses on falling and rising edges of a timing clock, each address corresponding to locations in different banks; and at least two read/write data ports configured to receive write data for storage in one of the banks, and output read data from one of the banks.
Development, Programming, and Debugging Environment
Granted: January 5, 2012
Application Number:
20120005693
A method includes receiving hardware description code that generically describes circuitry, and translating the hardware description code into one or more configuration files specific to a programmable system. The method further includes generating program code for a microcontroller of the programmable system based, at least in part, on the hardware description code, and configuring the programmable system to implement the circuitry according to the configuration files and the program…
ANTENNA WITH MULTIPLE FOLDS
Granted: December 29, 2011
Application Number:
20110316756
An example antenna includes a first end portion, a second end portion, and an intermediate portion between the first end portion and the second end portion. The intermediate portion includes multiple folds. The second end portion includes a first conductor to couple with a communication interface of a communication module, and a second conductor to couple with a ground.
Lattice Structure for Capacitance Sensing Electrodes
Granted: December 29, 2011
Application Number:
20110316567
One embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace, where the main trace intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to the corresponding intersection. A contiguous section of the main trace may cross at least one of the…
INTEGRATED SHIELDING FOR WAFER PLATING
Granted: December 22, 2011
Application Number:
20110308955
A semiconductor substrate carrier for use during wet chemical processing may comprise a conductive flange to couple the carrier with processing equipment, a frame coupled with the conductive flange, where the frame is configured to hold a semiconductor substrate, and an integrated shield coupled with the frame. The integrated shield is configured to alter an electric field near at least a portion of a surface of the semiconductor substrate during the wet chemical processing.
UNIVERSAL DIGITAL BLOCK INTERCONNECTION AND CHANNEL ROUTING
Granted: December 15, 2011
Application Number:
20110304354
A programmable routing scheme provides improved connectivity both between Universal Digital Blocks (UDBs) and between the UDBs and other mirco-controller elements, peripherals and external Inputs and Outputs (I/Os) in the same Integrated Circuit (IC). The routing scheme increases the number of functions, flexibility, and the overall routing efficiency for programmable architectures. The UDBs can be grouped in pairs and share associated horizontal routing channels. Bidirectional…
Microcontroller Programmable System on a Chip
Granted: November 17, 2011
Application Number:
20110283057
Embodiments of the present invention are directed to a microcontroller device having a microprocessor, programmable memory components, and programmable analog and digital blocks. The programmable analog and digital blocks are configurable based on programming information stored in the memory components. Programmable interconnect logic, also programmable from the memory components, is used to couple the programmable analog and digital blocks as needed. The advanced microcontroller design…
ESD TRIGGER FOR SYSTEM LEVEL ESD EVENTS
Granted: October 27, 2011
Application Number:
20110261489
A circuit includes first logic that generates a first signal suitable to activate at least one ESD clamp in response to an electrostatic discharge (ESD) event having a first severity or a second severity higher than the first severity, and second logic that generates a second signal suitable to activate the ESD clamp in response to the ESD event having the second severity, the second signal time multiplexed with the first signal.
Optical Navigation System Having A Filter-Window To Seal An Enclosure Thereof
Granted: October 13, 2011
Application Number:
20110248153
An optical navigation system and method are provided. In one embodiment, the system includes: (i) a coherent light source to emit light to illuminate a portion of a finger; and (ii) a detector to receive light reflected from the portion of the finger, the detector including a speckle-based sensor configured to sense movement of the finger relative to the detector based on changes in a complex interference pattern created by the light reflected from the portion of the finger. Other…
MEMORY SYSTEM AND METHOD
Granted: October 13, 2011
Application Number:
20110252162
In an embodiment, an apparatus includes a memory controller configured to control a plurality of daisy chained memory components connected over a daisy chained bus. The daisy chained bus includes a direct connection from the transmit interface of the memory controller to a receive interface of an initial memory component, and a daisy chain connection from a transmit interface of the initial memory component to a receive interface of a next memory component. A bus extends from a transmit…
Load Driver
Granted: September 29, 2011
Application Number:
20110234264
A method for driving a load includes driving a load to an initial voltage within a voltage window, the voltage window based on an input voltage and an offset voltage, and driving the load to approximately the input voltage.
CLOCK SYNTHESIS SYSTEMS, CIRCUITS AND METHODS
Granted: August 25, 2011
Application Number:
20110208329
A clock synthesis system may include a feed forward divider circuit configured to divide a source clock signal by one of a plurality of integers in response to a select signal to generate a reference clock that is synchronous to a synchronous pulse; a modulator that modulates the select signal in response to at least a difference value; a multiplier circuit that frequency multiplies the reference clock to generate an output clock; and a timing circuit that generates the difference value…
CIRCUIT, SYSTEM AND METHOD FOR MULTIPLEXING SIGNALS WITH REDUCED JITTER
Granted: July 21, 2011
Application Number:
20110176647
An apparatus having a plurality of power supply domains and a plurality of logic components. Each of the plurality of logic components residing within a different one of the plurality of power supply domains. Each of the plurality of logic components is configured to operate with a corresponding clock signal within a respective one of the plurality of power supply domains.
DIGITAL DRIVING CIRCUITS, METHODS AND SYSTEMS FOR LIQUID CRYSTAL DISPLAY DEVICES
Granted: July 14, 2011
Application Number:
20110169814
A method may include controlling a display device in at least first mode by varying a correlation between display driver signals applied across display segments within the display device; wherein the display driver signals vary between substantially only two levels, and a display segment is activated when an average voltage magnitude across the segment over a time period exceeds a threshold value.
CAPACITANCE MEASUREMENT SYSTEMS AND METHODS
Granted: June 30, 2011
Application Number:
20110156724
A first capacitor and a second capacitor are charged until voltage at the second capacitor settles to a settling voltage. While charging, the first capacitor is alternately switched between a current source and ground. When the settling voltage is reached, charging of the first capacitor is halted. The second capacitor continues to be charged until voltage at the second capacitor reaches a reference voltage. The amount of time it takes for the settling voltage to reach the reference…
METHOD AND APPARATUS FOR REDUCING COUPLED NOISE INFLUENCE IN TOUCH SCREEN CONTROLLERS
Granted: May 19, 2011
Application Number:
20110115729
A method and apparatus for reducing influence of noise for touch screen controllers employing noise listening synchronization, delay lines, filtering and sensing selected touch screen electrodes.
