Configurable and power-optimized integrated gate-driver for USB power-delivery and type-C SoCs
Granted: October 13, 2020
Patent Number:
10802571
Techniques for power-Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a method for an USB-enabled system with an integrated circuit (IC) controller comprises: determining, by the IC controller, whether a first power path or a second power path is coupled to the IC controller, where the first power path comprises an external N-channel power-FET and the second power path comprises an external P-channel power-FET; turning and maintaining ON…
System and methods for low power consumption by a wireless sensor device
Granted: October 6, 2020
Patent Number:
10797744
An example system and method operate a wireless device in a first mode with power to operate a communication resource of the wireless device turned off. While operating the wireless device in the first mode, the system and method evaluates an attribute in a first portion of sensor data. Responsive to the evaluation of the attribute, the system and method transitions to the wireless device to operate in a second mode with power to operate the communication resource turned on. The system…
Reducing sleep current in a capacitance sensing system
Granted: September 29, 2020
Patent Number:
10788937
An apparatus and method of measuring a collective capacitance on a group of capacitive sense elements from at least one of rows or columns of a capacitance sense array when in a first mode, and individually measuring capacitances on each of the rows and columns when in a second mode.
USB power control analog subsystem architecture
Granted: September 29, 2020
Patent Number:
10788875
A device and method that include a power control analog subsystem of a universal serial bus (USB) compatible power supply device is disclosed. The power control analog subsystem includes a programmable reference generator to generate first reference voltages. The power control analog subsystem also includes multiplexers, where each of a plurality of multiplexers are coupled to a first terminal and a second terminal of a producer field-effect transistor (FET) to receive a first voltage…
Bit error correction for wireless retransmission communications systems
Granted: September 22, 2020
Patent Number:
10784989
A system includes a transmitter configured to transmit an original packet. The system also includes a receiver comprising a processing device. The processing device is configured to receive a corrupted Bluetooth® packet of the original packet and at least one retransmitted packet of the original packet. The processing device is also configured to generate an accumulated packet based on the corrupted packet and the at least one retransmitted packet, and generate a decision packet for the…
Asset location using direction finding features
Granted: September 15, 2020
Patent Number:
10775471
Systems, methods, and apparatus receive a signal from a first wireless device through a first antenna, of a plurality of antennas, the signal including a first segment and a second segment. Responsive to detecting a change in the signal from the first segment to the second segment, embodiments traverse the plurality of antennas to receive the second segment through each of the plurality of antennas. Embodiments determine a plurality of phase samples, each associated with the second…
Load balance for dual interface automotive wi-fi controllers for P2P devices
Granted: September 15, 2020
Patent Number:
10779342
A method includes receiving at a wireless access point a first probe request from a first client device requesting connection with the wireless access point via a first frequency band, queueing the first client device in response to an indication that the first client device supports connection via the second frequency band, and in response to receiving at the wireless access point a second probe request from the first client device requesting connection with the wireless access point…
Split gate charge trapping memory cells having different select gate and memory gate heights
Granted: September 15, 2020
Patent Number:
10777568
A semiconductor device that has a split gate charge trapping memory cell having select and memory gates of different heights is presented herein. In an embodiment, the semiconductor device also has a low voltage transistor and a high voltage transistor. In one embodiment, the gates of the transistors are the same height as the select gate. In another embodiment, the gates of the transistors are the same height as the memory gate.
Booting an application from multiple memories
Granted: September 15, 2020
Patent Number:
10776257
A method includes using a memory address map, locating a first portion of an application in a first memory and loading a second portion of the application from a second memory. The method includes executing in place from the first memory the first portion of the application, during a first period, and by completion of the loading of the second portion of the application from the second memory. The method further includes executing the second portion of the application during a second…
Suppressing noise in touch panels using a shield layer
Granted: September 15, 2020
Patent Number:
10775929
A method, apparatus, and system measure, at a first channel of a processing device, a first signal indicative of a touch object proximate to an electrode layer. The first signal includes a touch data component and a first noise component generated by a noise source. The method, apparatus, and system measure, at a second channel of the processing device, a second signal including a second noise component generated by the noise source. The second channel is coupled to a shield layer…
Pressure detection and measurement with a fingerprint sensor
Granted: September 1, 2020
Patent Number:
10762325
A circuit, system, and method for measuring or detecting pressure or force of a fingerprint on an array of electrodes is described. Pressure or force may be measured or detected using a processed image of the fingerprint, or by measurement of capacitance of deformed variable capacitors.
Bus sharing scheme
Granted: September 1, 2020
Patent Number:
10762019
A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.
Input/output multiplexer bus
Granted: September 1, 2020
Patent Number:
10761125
One embodiment includes and I/O bus including a signal line coupled to a signal source and multiple line switches, each line switch to couple a corresponding I/O port to the signal line. Switch logic coupled to the I/O bus may programmatically switch the multiple line switches to couple at least one of the signal source and measurement circuitry to the respective I/O port.
Controlled gate-source voltage N-channel field effect transistor (NFET) gate driver
Granted: August 25, 2020
Patent Number:
10756644
Controlling gate-source voltage with a gate driver in a secondary-side controller in a secondary-controlled converter is described. In one embodiment, an apparatus includes a provider field effect transistor (FET) coupled to a transformer and the secondary-side controller coupled to the transformer. The gate driver is integrated on the secondary-side controller and is configured to control the gate-source voltage and slew rate of the secondary-side FET.
NAND memory cell string having a stacked select gate structure and process for for forming same
Granted: August 25, 2020
Patent Number:
10756101
A memory string is disclosed including a plurality of core cells serially connected between a source select gate and a drain select gate along a channel. Each core cell includes a wordline separated from the channel by a stack of layers including a charge trapping layer. At least one of the source and drain select gates is a stacked select gate with a plurality of components, including a first component adjacent to the plurality of core cells and a second component separated from the…
Operation of access points and autonomous group owners
Granted: August 18, 2020
Patent Number:
10750372
A system includes an apparatus and a station. The apparatus includes a first access point (AP) function configured to operate on a first channel of a first frequency band and a second AP function configured to operate on a second channel of a second frequency band. The apparatus also includes a processing device. In response to detecting that the second channel is unavailable for use by the second AP function, the processing device is configured to transition the second AP function to…
Estimating angle measurements for source tracking using a phased array system
Granted: August 18, 2020
Patent Number:
10746864
A method includes using a receiver of a first device, receiving from a second device, radio frequency (RF) signals. The method also includes using a processor of the first device, determining and storing, based on the RF signals, a set of angle-estimation values of an angle between a plurality of antenna elements of one of the first device and the second device and an antenna element of the other of the first device and the second device, a set of confidence measurements, and at least…
Dedicated TDLS link in off-channel 5 GHz band using RSDB
Granted: August 11, 2020
Patent Number:
10743358
Disclosed are methods and systems for operating a dual-band capable STA of a WiFi network in a real-time simultaneous dual band (RSDB) configuration in which a 2.4 GHz base-channel link to the WiFi network through the AP may operate in parallel with 5 GHz off-channel links to one or more peer STAs of the WiFi network through tunneled direct link setup (TDLS). The STA may connect to the AP and may establish a TDLS link with a peer STA over the base-channel. If the peer STA is capable of…
Passive touch detection for capacitive sense array
Granted: July 28, 2020
Patent Number:
10725591
A processing device scans a capacitive sense array to determine a characteristic of a noise signal. A processing device further detects a location of a touch proximate to the capacitive sense array by a passive touch object using a first mode of capacitance touch detection. The first mode of capacitive touch detection uses a capacitive coupling of the noise signal to the capacitive sense array through the passive touch object to detect the touch.
Dynamic VCONN swapping in dual-powered type-C cable applications
Granted: July 21, 2020
Patent Number:
10719112
A semiconductor device for a USB Type-C cable includes a first terminal to couple to a first VCONN line from a first end of the cable, a second terminal to couple to a second VCONN line from the second end of the cable, a charge pump, and a switch circuit coupled to the first terminal and the second terminal. The switch circuit includes a first drain-extended n-type field effect transistor (DENFET) coupled between the first terminal and an internal power supply of the semiconductor…
