System providing automatic source code generation for personalization and parameterization of user modules
Granted: June 30, 2020
Patent Number:
10698662
A method and system of automatically generating source code for configuring a programmable microcontroller. The method involves displaying virtual blocks in a computerized design system where the virtual blocks correspond to programmable circuit blocks in a microcontroller chip. The user selects a user module that defines a particular function to be performed on the microcontroller. The user assigns the virtual blocks to the user module. The design system then automatically generates…
Timestamp based onboarding process for wireless devices
Granted: June 23, 2020
Patent Number:
10693633
A method, apparatus, and system for provisioning a device onto a network using a non-secure communication channel between the device and a provisioner is described. The provisioner receives a timestamp-based on-time password (TOTP), and a universal resource identifier (URI) from the device and provides the TOTP and an out-of-band (OOB) UUID to a remote server over a secure communication channel identified by the URI. The device is then provisioned onto a network based on comparisons of…
Accurate feed-forward sensing in flyback-transformer based secondary controller
Granted: June 23, 2020
Patent Number:
10693384
A secondary side controller for an AC-DC converter and method for operating the same are provided. Generally, the controller includes a single synchronous rectifier sense (SR-SNS) pin coupled to a drain of a SR on a secondary of a transformer to sense a voltage (VSRD). In feed-forward (FF) mode VSRD is a sum of a voltage (VIN) on a primary divided by a turn-ratio (N) of the transformer and an output bus voltage (VBUS). A voltage-to-current (V2I) converter coupled to the SR-SNS pin and to…
Non-volatile memory with silicided bit line contacts
Granted: June 23, 2020
Patent Number:
10692877
An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density…
Encryption for XIP and MMIO external memories
Granted: June 23, 2020
Patent Number:
10691838
Techniques for multiplexing between an execute-in-place (XIP) mode and a memory-mapped input/output (MMIO) mode for access to external memory devices are described herein. In an example embodiment, an IC device comprises a serial interface and a controller that is configured to communicate with external memory devices over the serial interface. The controller comprises a control register and a cryptography block. The control register is configured to indicate an XIP mode or a MMIO mode.…
Multi-layer inter-gate dielectric structure and method of manufacturing thereof
Granted: June 16, 2020
Patent Number:
10686044
A memory device that has a first gate disposed adjacent to a second gate and a first dielectric structure disposed between the first and second gates. The first dielectric structure has at least four layers of oxide and nitride films arranged in an alternating layer, in which each of the at least four or more layers includes a width in an approximate range of 30 ? or less. The first dielectric structure further includes a top surface that is substantially un-etched.
Suppression of program disturb with bit line and select gate voltage regulation
Granted: June 16, 2020
Patent Number:
10685724
Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, a method for suppression of program disturb in a flash memory array is provided. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). During a program memory operation, a first voltage,…
Auto-switching communication interface
Granted: June 16, 2020
Patent Number:
10684974
A touch detection system in accordance with one embodiment of the invention can include a circuit for converting a capacitance to a digital value. The touch detection system can include first and second communication interface circuits for enabling a first and second communication protocols, respectively. Furthermore, the touch detection system can include a detector circuit coupled to the first communication interface circuit and the second communication interface circuit. The detector…
Non-volatile memory device and method of blank check
Granted: June 9, 2020
Patent Number:
10679712
A non-volatile memory device and methods for operating the same are provided. The memory device may have multiple complementary memory cells. The method of blank check includes detecting a state value of each of the true and complementary transistors, generating an upper state value, Wherein a first predetermined amount of the true and complementary transistors have greater state values than the upper state value, generating a lower state value, wherein a second predetermined amount of…
Devices, systems and methods for connecting and authenticating local devices to common gateway device
Granted: June 9, 2020
Patent Number:
10681544
A method can include detecting local devices with a wireless first communication interface (IF) of a gateway device; authenticating at least one local device with the gateway device, including by operation of the first communication IF and a second communication IF, relaying secure communications between the at least one local device and a server to enable authentication of the at least one local device by the server, and after receiving authentication of the at least one local device at…
Programmable input/output circuit
Granted: May 26, 2020
Patent Number:
10666258
A programmable input/output (I/O) circuit includes an output buffer coupled between an output signal and an I/O pad and an input comparator coupled between an input signal and the I/O pad. The input comparator includes a first input coupled to the I/O pad. A multiplexor receives a select signal for selecting a first reference voltage from the plurality of reference voltages at a first time and for dynamically selecting a second reference voltage from the plurality of reference voltages…
Communicating packets in a mesh network
Granted: May 19, 2020
Patent Number:
10659941
An apparatus includes a Bluetooth transceiver configured to receive a packet transmitted to a Bluetooth mesh network via a radio-frequency signal. The apparatus also includes a processing device coupled to the Bluetooth transceiver. The processing device is configured to determine a strength of the radio-frequency signal. The processing device is also configured to determine a time period based on the measure of strength of the radio-frequency signal. The processing device is further…
Transceiver for communication and method for controlling communication
Granted: May 12, 2020
Patent Number:
10651952
In an example embodiment, a communication system provides a clock extension peripheral interface (CXPI) communication bus that is coupled to a master node and a plurality of slave nodes. The master node is configured to transmit a reference clock signal on the CXPI communication bus. Each slave node of the plurality of slave nodes is configured to receive the reference clock signal from the CXPI communication bus and to transmit and receive data to and from the CXPI communication bus…
Accurate peak detection architecture for secondary controlled AC-DC converter
Granted: May 12, 2020
Patent Number:
10651754
An AC-DC converter with secondary side controller and synchronous rectifier (SR) architecture and method for operating the same are provided. Generally, the controller is implemented as an integrated circuit including a peak-detector module having a peak comparator with a first input coupled to a drain of the SR through a single SR sense (SR-SNS) pin to receive a sinusoidal input. A sample and hold (S/H) circuit with an input coupled to the SR-SNS pin samples the sinusoidal input and…
Accurate valley detection for secondary controlled flyback converter
Granted: May 12, 2020
Patent Number:
10651753
A flyback converter with secondary side control and synchronous rectifier (SR) architecture and method for operating the same are provided. Generally, the secondary side controller includes an integrated circuit (IC) including a single SR-SNS pin coupled to a drain of a SR on a secondary side of the converter to sense a voltage on the drain, and a power switch (PS) drive pin coupled to a PS on a primary side to turn on the PS in response to a number of measurements based on the voltage…
Programmable shunt regulator
Granted: May 12, 2020
Patent Number:
10649477
A device and method that includes a shunt regulator of a universal serial bus (USB) compatible power supply device is disclosed. The shunt regulator includes an amplifier with an output, a first input, and a second input. The shunt regulator also includes a current digital-to-analog converter (DAC) that is coupled to the first input of the amplifier and a voltage bus node. The current DAC adjusts a sink or a source current delivered at the first input of the amplifier to regulate a…
Charge-trapping memory device
Granted: May 5, 2020
Patent Number:
10644016
A structure and method for providing improved and reliable charge trapping memory device are disclosed herein. A charge trapping field effect transistor (FET) comprising a semiconductor substrate, a doped region in the semiconductor substrate, and a gate structure on the semiconductor substrate and a method of fabricating the same are also discussed. The doped region comprises a first lateral dimension along a first direction. The gate structure comprises a charge trapping dielectric…
Capacitance sensing and inductance sensing in different modes
Granted: April 28, 2020
Patent Number:
10635246
An apparatus for inductive sensing or capacitive sensing is described. The apparatus may include a signal generator to output on a first terminal a first signal in a first mode and a second signal in a second mode. The apparatus may include a charge measuring circuit to receive on a second terminal a third signal in the first mode and a fourth signal in the second mode. The third signal is representative of an inductance of a sense unit coupled between the first terminal and the second…
Combined analog architecture and functionality in a mixed-signal array
Granted: April 28, 2020
Patent Number:
10634722
A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a…
Reverse overcurrent protection for universal serial bus type-C (USB-C) connector systems
Granted: April 21, 2020
Patent Number:
10630028
An electronic device includes a first electronic circuitry portion configured to connect a VCONN supply terminal of a Universal Serial Bus Type-C (USB-C) controller to a first configuration channel (CC) terminal of a plurality of CC terminals of the USB-C controller. The first CC terminal of the USB-C controller is to be directly connected to a first CC terminal of a plurality of CC terminals of a USB-C receptacle. The electronic device further includes a second electronic circuitry…
