Implementing a circuit using an integrated circuit including parametric analog elements
Granted: February 24, 2015
Patent Number:
8966414
An environment and method are provided for designing and implementing a circuit comprising an integrated circuit (IC) including a number of parametric analog elements for which operating parameters can be set. Generally, the method comprises: specifying requirements for the circuit including physical properties to be sensed by the circuit and actions to be taken by the circuit; designing the circuit based on the specified requirements and resources available on the IC; and setting…
Adapting audio signals to a change in device orientation
Granted: February 24, 2015
Patent Number:
8965014
Left and right stereo channels L and R are provided to a first set of two or more speakers of a speaker array. A bass signal B is applied to a second set of one or more speakers of the speaker array. The level of L and R applied to the first set of speakers is increased as the first set of speakers is rotated to become more horizontally aligned. The level of B applied to the first set of speakers is decreased as the first set of speakers is rotated to become more horizontally aligned.
Ferroelectric memories with a stress buffer
Granted: February 24, 2015
Patent Number:
8963343
A device including a ferroelectric memory and methods of manufacturing the same are provided. In one embodiment, the device includes a semiconductor die with an integrated circuit fabricated thereon, a stress buffer die mounted to the semiconductor die overlying the integrated circuit, and a molding compound encapsulating the semiconductor die and the stress buffer die. Generally the integrated circuit includes a ferroelectric memory. In some embodiments, the device further includes a…
RFID access method using an indirect memory pointer
Granted: February 17, 2015
Patent Number:
8957763
A method of operating a memory in an RFID application includes locating a memory pointer at a fixed read/writeable memory location in the memory, determining a range of a pedigree buffer, initializing the memory pointer to a lowest value in the range, providing a second memory location that serves as a trigger address for an indirect write, and writing to a next location in the pedigree buffer by directing write data to the trigger address, which is then automatically written at a…
Systems, methods, and apparatus for memory cells with common source lines
Granted: February 10, 2015
Patent Number:
8953380
Systems, methods, and apparatus are disclosed for implementing memory cells having common source lines. The methods may include receiving a first voltage at a first transistor. The first transistor may be coupled to a second transistor and included in a first memory cell. The methods include receiving a second voltage at a third transistor. The third transistor may be coupled to a fourth transistor and included in a second memory cell. The first and second memory cells may be coupled to…
Non-volatile latch structures with small area for FPGA
Granted: February 3, 2015
Patent Number:
8947122
A latch circuit and method includes providing a first tri-gate non-volatile device, providing a second tri-gate non-volatile device, coupling the first tri-gate non-volatile device to the second tri-gate non-volatile device, erasing the first tri-gate non-volatile device, programming the second tri-gate non-volatile device, and latching an output node of the latch device to a logic state determined by respective thresholds of the first and second tri-gate non-volatile devices. Coupling…
Intelligent serial interface
Granted: February 3, 2015
Patent Number:
8949478
An intelligent serial interface circuit in accordance with one embodiment of the invention can include a first communication interface circuit for enabling a first communication protocol. The intelligent serial interface circuit can also include a second communication interface circuit for enabling a second communication protocol. Furthermore, the intelligent serial interface circuit can include a detector circuit coupled to the first communication interface circuit and the second…
System and method for synchronization of touch panel devices
Granted: February 3, 2015
Patent Number:
8947377
A system and method for synchronization of touch-panel devices is described. In one embodiment, the system includes a first controller device configured to control operations of a first portion of a touch-panel device such that the first controller device is further configured to generate a single master timing signal. The single master timing signal is configured to synchronize operation of the first controller device and a second controller device that is configured to control…
Method and apparatus for reducing coupled noise influence in touch screen controllers
Granted: February 3, 2015
Patent Number:
8947373
A method and apparatus for reducing influence of noise for touch screen controllers employing noise listening synchronization, delay lines, filtering and sensing selected touch screen electrodes.
Common mode trimming with variable duty cycle
Granted: February 3, 2015
Patent Number:
8947142
A resistive divider circuit may be operatively coupled with a modulated resistor circuit, wherein the resistive divider circuit and the modulated resistor circuit for an effective resistor circuit providing an effective attenuation. A variable duty cycle signal modulates the modulated resistor circuit to control the effective attenuation.
Serial data intermediary device, and related systems and methods
Granted: January 27, 2015
Patent Number:
8943256
An integrated circuit (IC) device can include a serial communication first interface (I/F) circuit electrically coupled to first physical connections of the IC device, and configured to respond to communication signals received at the first physical connections; at least one serial communication second interface (I/F) circuit electrically coupled to second physical connections of the IC device, and configured to enable data transactions over the second physical connections; and a…
Systems, methods, and devices for frequency calibration of transmitters
Granted: January 27, 2015
Patent Number:
8942315
Systems, methods, and devices are disclosed for implementing frequency calibration circuits. The devices may include a data source configured to generate a first data signal based on a first data value and a second data signal based on a second data value. The devices may include a gain control circuit configured to receive the first and second data signals from the data source, and generate a first modified data signal and a second modified data signal. The devices may include an…
Programmable buffer circuit
Granted: January 27, 2015
Patent Number:
8941410
Buffer circuit embodiments are described. A buffer circuit includes an input configured to receive an input signal and a buffer configured to generate an output signal based on the input signal. In one embodiment, the buffer circuit includes a programmable chopping module coupled with the buffer, wherein the programmable chopping module is programmable with a selected configuration from a plurality of configurations, and wherein the programmable chopping modulates the input signal based…
Detection of a conductive object during an initialization process of a touch-sensing device
Granted: January 27, 2015
Patent Number:
8941393
A method and system for detecting a presence of a conductive object proximate to a capacitive sense element during an initialization process of a touch-sensing device. A reference sense element is calibrated to produce a sensing parameter value. A capacitance of a plurality of capacitive sense elements is measured based on the sensing parameter value, and compared to a baseline capacitance value stored in a non-volatile memory of the touch-sensing device. The presence of a conductive…
Radical oxidation process for fabricating a nonvolatile charge trap memory device
Granted: January 27, 2015
Patent Number:
8940645
A method for fabricating a nonvolatile charge trap memory device is described. The method includes subjecting a substrate to a first oxidation process to form a tunnel oxide layer overlying a polysilicon channel, and forming over the tunnel oxide layer a multi-layer charge storing layer comprising an oxygen-rich, first layer comprising a nitride, and an oxygen-lean, second layer comprising a nitride on the first layer. The substrate is then subjected to a second oxidation process to…
Automatic API generation to functional PSoC blocks
Granted: January 13, 2015
Patent Number:
8935623
A method of generating an application programming interface (API) for an electronic circuit. A graphical user interface is displayed through which a user can initiate generation of the API. A component is selected from a plurality of components for placement in said electronic circuit. The component represents an implementable function in the electronic circuit. The component is configured using the graphical user interface. The data pertaining to the selected component and the…
Stack processor using a ferroelectric random access memory (F-RAM) for code space and a portion of the stack memory space
Granted: January 13, 2015
Patent Number:
8934279
A stack processor using a ferroelectric random access memory (F-RAM) for code space and a portion of the stack memory space. By storing some of the associated stacks in complementary metal oxide semiconductor (CMOS) or other volatile memory, read/write operations to only F-RAM would be obviated. As compared to an all F-RAM stack implementation, a faster, less power consuming and faster program execution time is provided. Firmware code can also be provided that will tend to concentrate…
Multi-purpose stylus antenna
Granted: December 30, 2014
Patent Number:
8922527
Methods and apparatuses of a multi-purpose stylus antenna are described. One device includes a processing device comprising a switch, an antenna circuit, and a capacitance sensor. The switch is configured to couple a conductive element between the antenna circuit and the capacitance sensor. The processing device is configured to communicate data to or from a stylus when the switch is coupled to the antenna circuit and to measure capacitance associated with the conductive element when the…
Methods to integrate SONOS into CMOS flow
Granted: December 23, 2014
Patent Number:
8916432
Methods of forming memory cells including non-volatile memory (NVM) and MOS transistors are described. In one embodiment the method includes: depositing and patterning a gate layer over a dielectric stack on a substrate to form a gate of a NVM transistor, the dielectric stack including a tunneling layer overlying a surface of the substrate, a charge-trapping layer overlying the tunneling layer and a blocking layer overlying the charge-trapping layer; forming a mask exposing source and…
Enhanced hydrogen barrier encapsulation method for the control of hydrogen induced degradation of ferroelectric capacitors in an F-RAM process
Granted: December 23, 2014
Patent Number:
8916434
A method of encapsulating a ferroelectric capacitor or ferroelectric memory cell includes forming encapsulation materials adjacent to a ferroelectric capacitor. forming a ferroelectric oxide (FEO) layer over the encapsulated ferroelectric capacitor, and forming an FEO encapsulation layer over the ferroelectric oxide to provide additional protection from hydrogen induced degradation.
