Facebook Patent Applications

GENERATING AND PROVIDING ORGANIZATION-BASED SPACES FOR A VIRTUAL COMMUNITY OF USERS

Granted: October 20, 2022
Application Number: 20220337543
According to examples, a system for generating and providing organization-bounded spaces for a virtual community of users may include a processor and a memory storing instructions. The processor, when executing the instructions, may cause the system to generate an organization-bounded space; analyze user information to associate a user with the organization-bounded space; enable the user to receive and publish a content item; and implement a security feature for communications associated…

GENERATION AND DELIVERY OF CONTENT VIA REMOTE RENDERING AND DATA STREAMING

Granted: May 12, 2022
Application Number: 20220150553
According to examples, a system for generating and delivering enhanced content utilizing remote rendering and data streaming is described. The system may include a processor and a memory storing instructions. The processor, when executing the instructions, may cause the system to transmit a selected engagement content item for transmission to a user device and receive an indication of interest relating to the selected engagement content item. The processor, when executing the…

Integration of Artificial Reality Interaction Modes

Granted: April 28, 2022
Application Number: 20220129082
Aspects of the present disclosure are for an interaction mode system that provides multiple interaction modes in an artificial reality environment with automatic, context-specific transitions between interaction modes. An interaction mode can specify how the interaction mode system determines direction indications and movement within an artificial reality environment and interactions for making selections or performing other actions. In some implementations, the interaction mode system…

SYSTEMS AND METHOD OF DESCRIBING SLOT INFORMATION

Granted: February 24, 2022
Application Number: 20220061047
Disclosed herein are systems and methods related to describing slot information. In one aspect, a first wireless communication device determines a bitmap having a value for each of a plurality of slots for wireless traffic. The bitmap may indicate a status or type of a corresponding slot. The first wireless communication device may send, using a wireless local area network (WLAN) based protocol, to a second wireless communication device, a message comprising the bitmap. The message may…

INTERFACES FOR A MESSAGING INBOX

Granted: February 10, 2022
Application Number: 20220043559
Exemplary embodiments relate to techniques for representing conversations in a messaging system, where content serves as the organizing feature or primitive of a messaging inbox. In the messaging inbox, a first level of organization allows for the selection of a user account associated with shared content. Upon selecting the user account, the account's content (e.g., photographs, videos, etc.) appear as a second level of organization. Thus, content may be aggregated in two hierarchical…

ARTIFICIAL REALITY SYSTEM WITH MULTI-STAGE BOOT PROCESS

Granted: January 6, 2022
Application Number: 20220004639
Techniques are described for improving security of a boot sequence of a system, such as an artificial reality system. In some examples, a method includes configuring, by a boot sequencing system, attack detection circuitry based on configuration information accessed from a first storage device; after configuring the attack detection circuitry, starting, by the boot sequencing system, a root of trust processor to initiate a boot sequence; enabling access, by the root of trust processor…

SYSTEMS AND METHODS FOR PRIORITIZING PACKET RETRANSMISSION

Granted: December 23, 2021
Application Number: 20210399836
Disclosed herein includes a system, a method, and a device for prioritizing packet retransmission. A transmitting device can insert, for each packet of a plurality of packets of a video frame, a sequence number indicative of an order of the corresponding packet among the plurality of packets, into a header of the corresponding packet according to an application layer protocol. The transmitting device can transmit to the receiving device, at a first level of priority, the plurality of…

AUTOMATED VISUAL SUGGESTION, GENERATION, AND ASSESSMENT USING COMPUTER VISION DETECTION

Granted: October 28, 2021
Application Number: 20210334600
An online system may identify content with which a user has an interest. For example, the online system may determine that a user has an interest in the content based on interaction information indicating that the user interacted with the content. In a particular example, the online system may identify image concepts included in the content based on computer vision techniques that recognize the image concepts. The online system may model probabilities that image concepts will appeal to…

MULTI-KEY ENCRYPTION AND DECRYPTION FOR SIDE CHANNEL ATTACK PREVENTION

Granted: June 17, 2021
Application Number: 20210184832
This disclosure describes systems on a chip (SOCs) that prevent side channel attacks (SCAs). An example SoC includes an encryption engine, a key store, and a security processor. The key store is configured to store a plurality of encryption keys. The encryption engine is configured to encrypt transmit (Tx) channel data using any encryption key of the plurality of encryption keys stored to the key store. The security processor is configured to activate SCA mitigation logic of the SoC…

Predicting Highlights for Media Content

Granted: May 20, 2021
Application Number: 20210150222
In one embodiment, a method includes accessing a first video; predicting a first noteworthy portion for the first video, wherein the first noteworthy portion is a portion of the first video that is predicted based on user-engagement information associated with the portion of the first video; extracting a first highlight from the first video, wherein the first highlight corresponds to the first noteworthy portion; and sending, to a client system of a user, information configured to render…

LOW LATENCY INTERACTIVE MEDIA DISTRIBUTION USING SHARED USER HARDWARE

Granted: February 25, 2021
Application Number: 20210058468
According to examples, a system for providing low latency interactive media distribution using shared user hardware may include a processor and a memory storing instructions. The processor, when executing the instructions, may cause the system to register host systems as candidate host systems to host interactive media on behalf of client devices. The system may further receive client device registration data of a client device. The system may select a host system from the candidate host…

SYSTEM AND METHOD FOR SHIFT-BASED INFORMATION MIXING ACROSS CHANNELS FOR SHUFFLENET-LIKE NEURAL NETWORKS

Granted: January 21, 2021
Application Number: 20210019633
Disclosed herein includes a system, a method, and a device for performing a convolution on data of a current layer of a neural network, including a plurality of channels arranged in a first order and partitioned into a plurality of first partitions according to the first order. Each first partition includes a result of a convolution on a corresponding partition of channels in data of a previous layer of the neural network. The device shifts the plurality of channels arranged in the first…

SYSTEM AND METHOD FOR PERFORMING SMALL CHANNEL COUNT CONVOLUTIONS IN ENERGY-EFFICIENT INPUT OPERAND STATIONARY ACCELERATOR

Granted: January 21, 2021
Application Number: 20210019591
Disclosed herein includes a system, a method, and a device for receiving input data to generate a plurality of outputs for a layer of a neural network. The plurality of outputs are arranged in a first array. Dimensions of the first array may be compared with dimensions of a processing unit (PE) array including a plurality of PEs. According to a result of the comparing, the first array is partitioned into subarrays by the processor. Each of the subarrays has dimensions less than or equal…

OPTIMIZATION FOR DECONVOLUTION

Granted: January 21, 2021
Application Number: 20210019363
Disclosed herein includes a system, a method, and a device for improving computational efficiency of deconvolution by reducing a number of dot products. In one aspect, an input image having a set of pixels is received. A first dot product may be performed on a subset of the set of pixels of the input image and a portion of a kernel, to generate a first pixel of an output image. A number of multiplications performed for the first dot product performed may be less than a number of elements…

SYSTEM AND METHOD FOR SUPPORTING ALTERNATE NUMBER FORMAT FOR EFFICIENT MULTIPLICATION

Granted: January 21, 2021
Application Number: 20210019115
Disclosed herein includes a system, a method, and a device including shift circuitry and add circuitry for performing multiplication of a first value and a second value for a neural network. The first value has a predetermined format including a first bit, and two or more second bits to represent a value of zero or 2n where n is an integer greater than or equal to 0. The device shifts, when the two or more second bits represent the value of 2n, the second value by (n+1) bits via the…

SYSTEMS AND METHODS FOR DISTRIBUTING A NEURAL NETWORK ACROSS MULTIPLE COMPUTING DEVICES

Granted: January 14, 2021
Application Number: 20210011288
Disclosed herein is a method for using a neural network across multiple devices. The method can include receiving, by a first device configured with a first one or more layers of a neural network, input data for processing via the neural network implemented across the first device and a second device. The method can include outputting, by the first one or more layers of the neural network implemented on the first device, a data set that is reduced in size relative to the input data while…

SYSTEMS AND METHODS FOR ASYMMETRICAL SCALING FACTOR SUPPORT FOR NEGATIVE AND POSITIVE VALUES

Granted: January 14, 2021
Application Number: 20210012202
Disclosed herein includes a system, a method, and a device for asymmetrical scaling factor support for negative and positive values. A device can include a circuit having a shift circuitry and multiply circuitry. The circuit can be configured to perform computation for a neural network, including multiplying, via the multiply circuitry, a first value and a second value. The circuit can be configured to perform computation for a neural network, including shifting, via the shift circuitry,…

SYSTEMS, METHODS, AND DEVICES FOR EARLY-EXIT FROM CONVOLUTION

Granted: January 14, 2021
Application Number: 20210012178
Disclosed herein includes a system, a method, and a device for early-exit from convolution. In some embodiments, at least one processing element (PE) circuit is configured to perform, for a node of a neural network corresponding to a dot-product operation with a set of operands, computation using a subset of the set of operands to generate a dot-product value of the subset of the set of operands. The at least one PE circuit can compare the dot-product value of the subset of the set of…

POWER EFFICIENT MULTIPLY-ACCUMULATE CIRCUITRY

Granted: January 14, 2021
Application Number: 20210011971
Disclosed herein includes a system, a method, and a device for multiply-accumulate operation. In one aspect, an input operand is received by control circuitry. In one aspect, the control circuitry determines a sparsity of the input operand, where the sparsity may indicate whether a value of the input operand has a predetermined value or not. In one aspect, the control circuitry determines a stationarity of the input operand, where the stationarity may indicate whether the value of the…

SYSTEMS AND METHODS FOR READING AND WRITING SPARSE DATA IN A NEURAL NETWORK ACCELERATOR

Granted: January 14, 2021
Application Number: 20210011846
Disclosed herein includes a system, a method, and a device for reading and writing sparse data in a neural network accelerator. A plurality of slices can be established to access a memory having an access size of a data word. A first slice can be configured to access a first side of the data word in memory. Circuitry can access a mask identifying byte positions within the data word having non-zero values. The circuitry can modify the data word to have non-zero byte values stored starting…