Fairchild Semiconductor Patent Grants

Class D pulse width modulator with dual feedback

Granted: October 21, 2014
Patent Number: 8866544
This document discusses, among other things, a modulator including a first integrator configured to receive an input signal and a first feedback signal from an output stage, a second integrator configured to receive an output of the first integrator and a second feedback signal, and a comparator configured to be coupled to a regulated supply voltage, to receive an output of the second integrator and a modulation signal, and to provide a pulse width modulated representation of the input…

Unbalanced parallel circuit protection fuse device

Granted: October 21, 2014
Patent Number: 8866256
In one general aspect, an apparatus can include a semiconductor substrate, and a first conductive fuse bus having a triangular-shaped portion with a bottom surface aligned along a plane substantially parallel to a surface of the semiconductor substrate. The apparatus can include a second conductive fuse bus having a bottom surface aligned along the plane, and a plurality of fuse links coupled between the triangular-shaped portion of the first conductive fuse bus and the second conductive…

Wafer level MOSFET metallization

Granted: October 21, 2014
Patent Number: 8866218
In one general aspect, a system can include a through-silicon-via (TSV) coupling a drain region associated with a vertical transistor to a back metal disposed on a second side of the substrate opposite the first side. The system can include a first metal layer, and a second metal layer aligned orthogonal to the first metal layer. The system can define a conduction path extending substantially vertically through the TSV to the substrate and laterally through the substrate.

Integrated overdrive and overvoltage protection device

Granted: October 14, 2014
Patent Number: 8861164
In one general aspect, an apparatus can include an overcurrent protection device. The apparatus can include an overvoltage protection device coupled to the overcurrent protection device and configured to cause the overcurrent protection device to decrease a current through the overvoltage protection device after a breakdown voltage of the overvoltage protection device increases in response to heat.

Scalable voltage ramp control for power supply systems

Granted: October 14, 2014
Patent Number: 8860595
A system for scalable voltage ramp control for power supply systems. A system may comprise at least power supply circuitry, digital-to-analog (D/A) converter circuitry and a controller. The power supply circuitry may be configured to output a voltage to a load based on an input voltage provided by the D/A converter. The controller may be configured to control the D/A converter (e.g., to cause the D/A converter to provide the input voltage to the power supply circuitry) using a large…

Edge rate control gate driver for switching power converters

Granted: October 14, 2014
Patent Number: 8860398
This document discusses, among other things, apparatus and methods for an edge rate driver for a power converter switch. In an example, the driver can include an input node configured to receive a pulse width modulated signal, a first switch configured to couple a control node of the power converter switch to a supply voltage during a first state, a second switch configured to couple the control node of the power converter switch to a reference voltage during a second state, and a first…

Silicon carbide bipolar junction transistor (BJT) having a surface electrode disposed on a surface passivation layer formed at a region between emitter contact and base contact

Granted: October 7, 2014
Patent Number: 8853827
In at least one aspect, an apparatus can include a silicon carbide material, a base contact disposed on a first portion of the silicon carbide material, and an emitter contact disposed on a second portion of the silicon carbide material. The apparatus can also include a dielectric layer disposed on the silicon carbide material and disposed between the base contact and the emitter contact, and a surface electrode disposed on the dielectric layer and separate from the base contact and the…

Power management with over voltage protection

Granted: September 16, 2014
Patent Number: 8836166
This document discusses, among other things, systems and methods to provide an internal supply rail with over voltage protection using a host power source, an external power source, and a switch configured to receive indications of host and external power source validity. In an example, the switch can be configured to provide the internal supply rail using the host power source when the indication of host power source validity indicates a valid host power source and the external power…

Superjunction structures for power devices and methods of manufacture

Granted: September 16, 2014
Patent Number: 8836028
In a general aspect, a power device can include at least one N-type epitaxial layer disposed on a substrate and a plurality of N-pillars and P-pillars that define alternating P-N-pillars in the at least one N-type epitaxial layer. The power device can also include an active region and a termination region, where the termination region surrounds the active region. The alternating P-N-pillars can be disposed in both the active region and the termination region, where the termination region…

Audio jack detection and configuration

Granted: September 9, 2014
Patent Number: 8831234
This document discusses, among other things, an audio jack detection circuit configured to be coupled to an audio jack receptacle of an external device. The audio jack detection circuit configured to receive to receive audio jack receptacle information, to disable an oscillator when the audio jack receptacle information indicates that the audio jack receptacle is empty, and to enable the oscillator when the audio jack receptacle information indicates that the audio jack receptacle…

Amplifier crosstalk cancellation technique

Granted: September 9, 2014
Patent Number: 8831230
This document discusses apparatus and methods for configuring and providing crosstalk cancellation to maintain channel separation in a multi channel system. In an example, an amplifier circuit can include a crosstalk cancellation circuit configured to reduce crosstalk from a first output to a second load and from a second output to a first load where the first load and the second load share a return path.

ESD protection against charge coupling

Granted: September 9, 2014
Patent Number: 8830639
This document discusses among other things apparatus and methods for reducing ESD damage to buffer circuits. In an example, an output buffer can include an output, a first transistor configured to couple the output to a high logic supply rail, a second transistor configured to couple the output node to a low logic supply rail, pre-driver logic configured to drive a gate of the first transistor and a gate of the second transistor, and a first resistor configured to reduce electrostatic…

DC offset tracking circuit

Granted: September 9, 2014
Patent Number: 8829991
This document discusses, among other things, an amplifier circuit including first and second amplifiers configured to receive an input signal and to provide a differential output signal using a feedback loop including a transconductance amplifier. A non-inverting input of a first amplifier can be configured to receive an input signal. The feedback loop can be configured to receive the outputs from the first and second amplifiers and to provide a feedback signal to the non-inverting input…

No pin test mode

Granted: September 9, 2014
Patent Number: 8829932
This application provides apparatus and methods for initiating tests in an interface circuit without using inputs of the interface circuit dedicated to initiating the tests. In an example, a test mode interface circuit can include a voltage comparator configured compare a first voltage to a second voltage, a ripple counter configured to count pulses from a processor when the voltage comparator indicates that the first voltage is greater than the second voltage, and wherein the test mode…

Method of forming a dual-trench field effect transistor

Granted: September 9, 2014
Patent Number: 8829641
In one general aspect, a method of forming a field effect transistor can include forming a well region in a semiconductor region of a first conductivity type where the well region is of a second conductivity type and has an upper surface and a lower surface. The method can include forming a gate trench extending into the semiconductor region to a depth below a depth of the lower surface of the well region, and forming a stripe trench extending through the well region and into the…

Power device with monolithically integrated RC snubber

Granted: September 9, 2014
Patent Number: 8829624
In one general aspect, a semiconductor structure can include a power transistor including a body region extending in a silicon region, a gate electrode insulated from the body region by a gate dielectric, a source region extending in the body region where the source region is of opposite conductivity type from the body region, a source interconnect contacting the source region, and a backside drain. The semiconductor structure can include an RC snubber monolithically integrated with the…

Silicon carbide semiconductor device

Granted: September 9, 2014
Patent Number: 8829533
The present invention relates to a semiconductor device (1) in silicon carbide, with a highly doped substrate region (11) and a drift region (12). The present invention specifically teaches that an additional layer (13) is positioned between the highly doped substrate region (11) and the drift region (12), the additional layer (13) thus providing a wide safe operating area at subsequently high voltages and current densities.

Use of plate oxide layers to increase bulk oxide thickness in semiconductor devices

Granted: September 2, 2014
Patent Number: 8822296
Semiconductor devices and methods for making such devices are described. The semiconductor devices are made by providing a semiconductor substrate with an active region, providing a bulk oxide layer in a non-active portion of the substrate, the bulk oxide layer having a first thickness in a protected area of the device, providing a plate oxide layer over the bulk oxide layer and over the substrate in the active region, forming a gate structure on the active region of the substrate, and…

Determining automatic gain control levels

Granted: September 2, 2014
Patent Number: 8824701
An apparatus comprises an integrated circuit (IC) and a resistor external to the IC. The IC includes a current output digital-to-analog converter (IDAC) circuit configured to provide an adjustable specified current to a resistor external to the apparatus, a voltage sensing circuit configured to sense the voltage of the external resistor, and an automatic gain control (AGC) circuit configured to receive threshold information using the adjustable specified current.

High-voltage diodes formed in advanced power integrated circuit devices

Granted: September 2, 2014
Patent Number: 8823051
A diode-connected lateral transistor on a substrate of a first conductivity type includes a vertical parasitic transistor through which a parasitic substrate leakage current flows. Means for shunting at least a portion of the flow of parasitic substrate leakage current away from the vertical parasitic transistor is provided.