Formfactor Patent Grants

System for measuring signal path resistance for an integrated circuit tester interconnect structure

Granted: September 19, 2006
Patent Number: 7109736
Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are…

High density planar electrical interface

Granted: September 19, 2006
Patent Number: 7108546
An apparatus including a substrate having a plurality of through holes and a plurality of cables, including wires and/or coaxial cables, extending through respective ones of the plurality of through holes of the substrate. Each of the cables comprises a conductor and terminates about a surface of the substrate such that the conductors of respective ones of plurality of cables are planarly aligned and available for electrical contact. A system including a cable interface extending through…

Automated system for designing and testing a probe card

Granted: August 15, 2006
Patent Number: 7092902
A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to…

Method of making a contact structure with a distinctly formed tip structure

Granted: August 8, 2006
Patent Number: 7086149
A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are “stacked up” so that the orientation of the space transformer, hence the orientation of the tips of the probe…

Contact structures and methods for making same

Granted: August 1, 2006
Patent Number: 7082682
Contact structures are formed by building a core structure on a substrate and over coating the core structure with a material that is harder or has a greater yield strength than the material of the core structure. The core structure may be formed by attaching a wire to the substrate and spooling the wire out from a spool. While spooling the wire out, the spool may be moved to impart a desired shape to the wire. The wire is severed from the spool and over coated. As an alternative, the…

Apparatus and method for limiting over travel in a probe card assembly

Granted: August 1, 2006
Patent Number: 7084650
Methods and apparatuses for testing semiconductor devices are disclosed. Over travel stops limit over travel of a device to be tested with respect to probes of a probe card assembly. Feedback control techniques are employed to control relative movement of the device and the probe card assembly. A probe card assembly includes flexible base for absorbing excessive over travel of the device to be tested with respect to the probe card assembly.

Probe for semiconductor devices

Granted: August 1, 2006
Patent Number: 7084656
An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The contact structure includes an internal flexible elongate member having first and second ends and with the first end forming a first intimate bond to the surface of said conductive contact terminal without the use of a separate bonding material. An electrically conductive shell is provided and is…

Wafer-level burn-in and test

Granted: July 18, 2006
Patent Number: 7078926
Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or incorporated therein, metallic spring contact elements effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly…

Method for mounting a plurality of spring contact elements

Granted: July 11, 2006
Patent Number: 7073254
Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined on a sacrificial substrate. The openings may be within the surface of the substrate, or in one or more layers deposited on the surface of the sacrificial substrate. Each spring contact element has a base end portion, a contact end portion, and a central body portion. The contact end portion is offset in the z-axis (at a different height) than the central body portion. The…

Probe card configuration for low mechanical flexural strength electrical routing substrates

Granted: July 4, 2006
Patent Number: 7071715
A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3)…

Method and system for compensating for thermally induced motion of probe cards

Granted: July 4, 2006
Patent Number: 7071714
The present invention discloses a method and system compensating for thermally induced motion of probe cards used in testing die on a wafer. A probe card incorporating temperature control devices to maintain a uniform temperature throughout the thickness of the probe card is disclosed. A probe card incorporating bi-material stiffening elements which respond to changes in temperature in such a way as to counteract thermally induced motion of the probe card is disclosed including rolling…

Segmented contactor

Granted: June 27, 2006
Patent Number: 7065870
A method of fabricating a large area, multi-element contactor. A segmented contactor is provided for testing semiconductor devices on a wafer that comprises a plurality of contactor units mounted to a substrate. The contactor units are formed, tested, and assembled to a backing substrate. The contactor units may include leads extending laterally for connection to an external instrument such as a burn-in board. The contactor units include conductive areas such as pads that are placed into…

Composite microelectronic spring structure and method for making same

Granted: June 20, 2006
Patent Number: 7063541
An improved microelectronic spring structure, and method of making the same, are disclosed. The improvement comprises, in a spring contact of the type comprising a beam attached to a post, of replacing the post with a plurality of column elements. The beam component is thus provided with one or more column elements which both structurally support and electrically connect one end of the beam to an electronic component. The column elements are preferably comprised of relatively straight…

Probe card assembly and kit

Granted: June 20, 2006
Patent Number: 7064566
In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly…

Electronic package with direct cooling of active electronic components

Granted: June 20, 2006
Patent Number: 7064953
A cooling assembly includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components. A coolant port allows a coolant to enter the package and directly cool the active electronic components of the dies.

Sockets for “springed” semiconductor devices

Granted: June 13, 2006
Patent Number: 7059047
Temporary connections to spring contact elements extending from an electronic component such as a semiconductor device are made by urging the electronic component, consequently the ends of the spring contact elements, vertically against terminals of an interconnection substrate, or by horizontally urging terminals of an interconnection substrate against end portions of the spring contact elements. A variety of terminal configurations are disclosed.

Probe card assembly

Granted: June 13, 2006
Patent Number: 7061257
In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly…

Adjustable delay transmission lines

Granted: June 6, 2006
Patent Number: 7057474
A transmission line includes a signal conductor and at least one varactor diode capacitively coupled to the signal conductor. The transmission line's signal path delay is a function of its shunt capacitance, and the varactor's capacitance forms a part of the transmission line's shunt capacitance. The transmission line's signal path delay is adjusted by adjusting a control voltage across the varactor diode thereby to adjust the varactor diode's capacitance.

Method for testing signal paths between an integrated circuit wafer and a wafer tester

Granted: May 30, 2006
Patent Number: 7053637
Signal paths within an interconnect structure linking input/output (I/O) ports of an integrated circuit (IC) tester and test points of an IC die on a wafer are tested for continuity, shorts and resistance by using the interconnect structure to access a similar arrangement of test points on a reference wafer. Conductors in the reference wafer interconnect groups of test points. The tester may then test the continuity of signal paths through the interconnect structure by sending test…

Method of making microelectronic spring contact array

Granted: May 23, 2006
Patent Number: 7047638
A method of making a microelectronic spring contact array comprises forming a plurality of spring contacts on a sacrificial substrate and then releasing the spring contacts from the sacrificial substrate. Each of the spring contacts has an elongated beam having a base end. The method of making the array includes attaching the spring contacts at their base ends to a base substrate after they have been released entirely from the sacrificial substrate, so that each contact extends from the…