Detecting discrepancies between clinical notes and administrative records
Granted: May 21, 2024
Patent Number:
11990216
A mechanism is provided for implement a discrepancy detection mechanism for detecting discrepancies between clinical notes and administrative records. Clinical concepts are extracted from the clinical notes and the administrative records in a patient's electronic medical records (EMRs). The extracted clinical concepts are filtered based on semantic type information to identify concepts that reference diseases or syndromes while also removing negated instances. Utilizing the positive…
Replacement-channel fabrication of III-V nanosheet devices
Granted: May 21, 2024
Patent Number:
11990530
Semiconductor devices and methods of forming the same include forming a stack of alternating first and second sacrificial layers. The first sacrificial layers are recessed relative to the second sacrificial layers. Replacement channel layers are grown from sidewalls of the first sacrificial layers. A first source/drain region is grown from the replacement channel layer. The recessed first sacrificial layers are etched away. A second source/drain region is grown from the replacement…
Dual step etch-back inner spacer formation
Granted: May 21, 2024
Patent Number:
11990508
Semiconductor devices and methods of forming the same include recessing sacrificial layers in a stack of alternating sacrificial layers and channel layers using a first etch to form curved recesses at sidewalls of each sacrificial layer in the stack, with tails of sacrificial material being present at a top and bottom of each curved recess. Dielectric plugs are formed that each partially fill a respective curved recess, leaving exposed at least a portion of each tail of sacrificial…
Ferroelectric and paraelectric stack capacitors
Granted: May 21, 2024
Patent Number:
11990470
An apparatus includes a first plate, a second plate, a third plate, a ferroelectric dielectric, and a paraelectric dielectric. The ferroelectric dielectric is between the first plate and the second plate such that the first plate, the ferroelectric dielectric, and the second plate form a first capacitor. The paraelectric dielectric is between the second plate and the third plate such that the second plate, the paraelectric dielectric, and the third plate form a second capacitor.
System and method for forming solder bumps
Granted: May 21, 2024
Patent Number:
11990437
In an embodiment, a method for forming a solder bump includes preparing a transfer mold having a solder pillar extending from a mold substrate and through a first photoresist layer and having a shape partially defined by a second photoresist layer that is removed prior to transfer of the solder. In an embodiment, the mold substrate is flexible. In an embodiment, the transfer mold is flexible. In an embodiment, the method includes providing a device substrate having a wettable pad. In an…
BEOL alternative metal interconnects: integration and process
Granted: May 21, 2024
Patent Number:
11990414
Back-end-of-the line (BEOL) interconnect structures are provided in which an alternative metal such as, for example, a noble metal, is present in a combined via/line opening that is formed in an interconnect dielectric material layer. A surface diffusion dominated reflow anneal is used to reduce the thickness of a noble metal layer outside the combined via/line opening thus reducing or eliminating the burden of polishing the noble metal layer. In some embodiments and after performing the…
Buried power rails located in a base layer including first, second, and third etch stop layers
Granted: May 21, 2024
Patent Number:
11990412
Integrated chips and methods of forming the same include forming a stack of layers, including a device stack above a first sacrificial layer, above a substrate. The first sacrificial layer is replaced with a first etch stop layer. The substrate is removed, exposing a substrate-side of the stack of layers. The substrate-side of the stack of layers is etched to form a trench, stopping on the first etch stop layer. A conductive line is formed in the trench.
Top via interconnect having a line with a reduced bottom dimension
Granted: May 21, 2024
Patent Number:
11990410
A technique relates to an integrated circuit (IC). The IC includes a conductive line formed on a conductive via, the conductive line being formed though a dielectric material. The IC includes an etch stop layer having one or more extended portions intervening between one or more edge portions of the conductive line and the conductive via, the one or more edge portions being at a periphery of the conductive line and the conductive via, the etch stop layer including a higher dielectric…
Metal cut patterning and etching to minimize interlayer dielectric layer loss
Granted: May 21, 2024
Patent Number:
11990342
The present disclosure relates to methods and apparatuses related to the deposition of a protective layer selective to an interlayer dielectric layer so that the protective layer is formed onto a top portion associated with the interlayer dielectric layer. In some embodiments, a method comprises: forming an interlayer dielectric layer on a substrate; covering a trench region with a metal liner, wherein the trench region is situated above the substrate and formed within the interlayer…
Dynamic infection map
Granted: May 21, 2024
Patent Number:
11990245
A network architecture may receive situational data. The network architecture may acquire participant data associated with a participant. The network architecture may accept object data associated with an object. The network architecture may generate likelihood of infectiousness of the object based on the participant data and the object data. The network architecture may display the likelihood of infectiousness to one or more users.
Generative adversarial network implemented digital script modification
Granted: May 21, 2024
Patent Number:
11989509
A system, method, and computer program product for implementing digital script modification is provided. The method includes generating image sequences associated with textual content of a digital story. Multiple contextual dimensions are identified within the textual content and a group of dimensions are selected. The image sequences in combination with the group of dimensions are expanding or contracted and image sequences are altered based on detected interactions with the group of…
Handling form data errors arising from natural language processing
Granted: May 21, 2024
Patent Number:
11990214
Aspects include receiving a document and classifying at least a subset of the document as having a first type of data. Features are extracted from the document. The extracting includes initiating processing of the at least a subset of the document by a first processing engine that was previously trained to extract features from the first type of data. The extracting also includes initiating processing of a remaining portion of the document not included in the at least a subset of the…
Depth map generation from sparse depth samples in an augmented reality environment
Granted: May 21, 2024
Patent Number:
11989897
Systems, computer-implemented methods, and computer program products to facilitate sparse depth completion with semantic mesh deformation optimization in an augmented reality environment are provided. According to an embodiment, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components comprise a depth completion component that generates a first depth map from an image and sparse depth samples. The computer…
Search space exploration for deep learning
Granted: May 21, 2024
Patent Number:
11989656
Aspects of the invention include systems and methods to obtain meta features of a dataset for training in a deep learning application. A method includes selecting an initial search space that defines a type of deep learning architecture representation that specifies hyperparameters for two or more neural network architectures. The method also includes applying a search strategy to the initial search space. One of the two or more neural network architectures are selected based on a result…
Machine teaching complex concepts assisted by computer vision and knowledge reasoning
Granted: May 21, 2024
Patent Number:
11989628
Machine teaching in an embodiment can include receiving a user annotated concept for a given image in given context. The given image can be broken into parts and classified. Relationships can be determined associated with the parts. The created relationships can be stored along with the user annotated concept in a knowledge base. One or more similar images can be annotated using the parts and relationships. A second image associated the given context can be retrieved, decomposed into…
Generating performance predictions with uncertainty intervals
Granted: May 21, 2024
Patent Number:
11989626
A technique for generating a performance prediction of a machine learning model with uncertainty intervals includes obtaining a first model configured to perform a task and a production dataset. At least one metric predicting a performance of the first model at performing the task on the production dataset is generated using a second model. The second model is a meta-model associated with the first model. At least one value predicting an uncertainty of the at least one metric predicting…
Tiling of cross-resonance gates for quantum circuits
Granted: May 21, 2024
Patent Number:
11989621
Techniques regarding tiling a CR gate configuration to one or more lattices characterizing quantum circuit topologies are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a tiling…
Micro-pattern based application modernization assessment
Granted: May 21, 2024
Patent Number:
11989549
Methods, computer program products, and/or systems are provided that perform the following operations: identifying an application marker for a source application; mapping the application marker to a set of micro-patterns provided in a micro-pattern repository, wherein a micro-pattern defines a set of actions to be performed to modernize a source application component for a target platform; generating a set of potential modernization pathways for the source application, wherein a…
Adjusting explainable rules using an exploration framework
Granted: May 21, 2024
Patent Number:
11989515
A computer-implemented method according to one embodiment includes receiving a plurality of linguistic expressions (LEs); changing one or more conditions of the plurality of linguistic expressions to create an updated plurality of linguistic expressions, utilizing a visual exploration framework (VEF) that visually presents to a user each of the plurality of linguistic expressions; and including the updated plurality of linguistic expressions in a model used to classify input sentences.…
Quantitative comment summarization
Granted: May 21, 2024
Patent Number:
11989513
A computing system, computer program product, and computer-implemented method for quantitative comment summarization are provided. The method includes receiving a collection of comments, identifying a set of candidate key points corresponding to the collection of comments, and selecting a subset of key points from the set of candidate key points, wherein the selected subset of key points includes key points that are most salient in the collection of comments. The method also includes…
