Linear Technology Patent Applications

Accurate Current Sensing with Heat Transfer Correction

Granted: August 30, 2012
Application Number: 20120218022
In one embodiment, a current sensing circuit corrects for the transient and steady state temperature measurement errors due to physical separation between a resistive sense element and a temperature sensor. The sense element has a temperature coefficient of resistance. The voltage across the sense element and a temperature signal from the temperature sensor are received by processing circuitry. The processing circuitry determines a power dissipated by the sense element, which may be…

Circuits For And Methods Of Accurately Measuring Temperature Of Semiconductor Junctions

Granted: August 16, 2012
Application Number: 20120207190
A system for and method of providing a signal proportional to the absolute temperature of a semiconductor junction is provided. The system comprises: a preprocessing stage configured and arranged so as to process a signal from the semiconductor junction so as to produce a preprocessed signal including a resistance error term; and a temperature to voltage converter stage for converting the preprocessed signal to a voltage proportional to absolute temperature representing the absolute…

INTERPOLATING DIGITAL-TO-ANALOG CONVERTER WITH SEPARATE BIAS CURRENT SOURCE FOR EACH DIFFERENTIAL INPUT TRANSISTOR PAIR

Granted: August 16, 2012
Application Number: 20120206284
The most significant portion of a digital word may be converted into a high and a low analog voltage representative, respectively, of the highest and lowest possible values which a digital word could have with the most significant portion. An analog output may be produced by interpolating between the high and the low analog voltage in accordance with the value of the least significant portion of the digital word. A differential transconductance input stage may have pairs of differential…

SYSTEM AND METHOD FOR CHARGING CAPACITORS USING AUTOMATIC CELL BALANCING

Granted: June 28, 2012
Application Number: 20120161722
A circuit for charging a capacitor block including series-connected capacitive elements has an input node for receiving an input, an output node coupled to the capacitor block, a third capacitive element connectable to the input node and the output node, and first and second switching circuitries coupled to the third capacitive element. A voltage sensor determines a relationship between first voltage at the first capacitive element and second voltage at the second capacitive element to…

Bias Point Setting for Third Order Linearity Optimization of Class A Amplifier

Granted: June 7, 2012
Application Number: 20120139642
An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation (IM3) products. In an embodiment of a Class A amplifier, the linear amplifier is a bipolar, common emitter-configured (CE) transistor using a cascode transistor to provide a fixed collector bias voltage to the CE transistor. The CE transistor has a transconductance vs. base-emitter voltage (VBE) characteristic which, when plotted, shows a transconductance that increases…

Third Order Intermodulation Cancellation by In-Line Generated Signal

Granted: June 7, 2012
Application Number: 20120139629
An actual linear amplifier distorts an input signal, such as an RF signal, and generates third order intermodulation (IM3) products. A single-port predistortion circuit is connected at a single node of an input line to the amplifier via an AC coupling capacitor. The fundamental frequency of the input signal is applied to a forward biased diode junction. The current through the diode is applied to a second capacitor. The appropriate setting of a tuning device, such as a tunable resistor…

HIGH DYNAMIC RANGE COULOMB COUNTER WHICH SIMULTANEOUSLY MONITORS MULTIPLE SENSE RESISTORS

Granted: June 7, 2012
Application Number: 20120139611
A circuit may include a source of electrical energy and a plurality of current loads. Each load may be of a different amount. For each current load, a resistance may be in series between the source and the current load. The resistance may be weighted inversely proportional to the amount of the current load with respect to the other resistances. For each resistance, an integrator may generate an integrated output representative of an integration of the current traveling through the…

A/D CONVERTER USING ISOLATION SWITCHES

Granted: February 2, 2012
Application Number: 20120026027
In an A/D converter, isolation switches are used between the capacitors and the conversion switches. The conversion switches are those switches used to selectively couple the plates of the binary weighted capacitors to either Vref or 0 volts during the A/D conversion process. During sampling of the input voltage signal, the isolation switches are opened to isolate the conversion switches from the wide range of possible input voltages at the bottom plates of the capacitors. Therefore, the…

SYNCHRONOUS RECTIFIER CONTROL FOR SYNCHRONOUS BOOST CONVERTER

Granted: January 26, 2012
Application Number: 20120019228
A synchronous boost DC/DC conversion system comprises an input for receiving a DC input voltage, an output for producing a DC output voltage, a power switch controllable to adjust an output signal of the conversion system, and an inductor coupled to the input. A synchronous rectifier is configurable to create a conduction path between the inductor and the output to provide the inductor discharge. A control circuit is provided for controlling the synchronous rectifier as the input voltage…

Capacitively Coupled Switched Current Source

Granted: January 19, 2012
Application Number: 20120013389
In the preferred embodiment, a current source is switchable between two precisely defined output currents. A terminal of a coupling capacitor is coupled to the gate of an output MOSFET. The other terminal of the capacitor is switched between two reference voltages to toggle the MOSFET to output the selected one of the two currents. A switchable bias voltage source is coupled to the gate only during the on state of the MOSFET to set the gate voltage of the MOSFET. The current output of…

METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND

Granted: January 12, 2012
Application Number: 20120007649
A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of…

LEADFRAME CURRENT SENSOR

Granted: January 5, 2012
Application Number: 20120001649
A current sensor is disclosed. The current sensor includes a leadframe having a die paddle, a portion of the die paddle being configured as a resistive element through which current can flow, and an integrated circuit (IC) die attached and thermally coupled to the die paddle. The IC die includes a current sensing module configured to measure a voltage drop across the resistive element and convert the voltage drop measurement to a current measurement signal and a temperature compensation…

DC/DC CONVERTER WITH MAGNETIC FLUX DENSITY LIMITS

Granted: December 8, 2011
Application Number: 20110299304
A DC/DC converter may include a power stage circuit, a pulse generator circuit, a flux density monitor, and power control logic. The power stage circuit includes an input, an output, and a transformer with a core. The power stage circuit may be configured to operate in a power transfer mode during which power is transferred from the input to the output and a reset mode during which flux density in the core of the transformer is reduced. The pulse generator circuit may be configured to…

DYNAMIC COMPENSATION OF AGING DRIFT IN CURRENT SENSE RESISTOR

Granted: December 8, 2011
Application Number: 20110298473
A current sense resistor circuit may include a primary current sense resistor that drifts with age. A secondary current sense resistor may drift with age in substantial unison with the primary current sense resistor. A calibration resistor may not drift with age in substantial unison with the primary current sense resistor. A compensation circuit may compensate for aging drift in the resistance of the primary current sense resistor based on a comparison of the calibration resistor with…

A/D Converter with Compressed Full-Scale Range

Granted: November 24, 2011
Application Number: 20110285569
An embodiment of an analog-to-digital converter system is described wherein an analog voltage signal Vin(t) is provided by an input amplifier. The analog signal Vin(t) has a predetermined full-scale range that is less wide than a reference voltage (Vref) range used by a downstream ADC to derive a first digital (numerical) representation D1(k) of a sampled value Vin(k) of the analog signal Vin(t). The first digital representation has N bits. A digital circuit then converts the N-bit D1(k)…

ERROR AMPLIFIER FOR REGULATING SINGLE FEEDBACK INPUT AT MULTIPLE LEVELS

Granted: October 6, 2011
Application Number: 20110241772
An error amplifier may be part of a voltage regulator and may include a single feedback input configured to receive a feedback signal. A single error output may be configured to provide an error output signal indicative of error in the feedback signal. A comparison circuit may be configured to provide an error signal to the single error output which is indicative of a difference between the feedback signal and whichever one of a set of reference signals is closest to the feedback signal.…

TIME-MULTIPLEXED RESIDUE AMPLIFIER

Granted: August 4, 2011
Application Number: 20110187573
A system is configured and a method is provided for receiving an input ratio represented by a first input signal and a second input signal, and producing an output ratio represented by a first output signal and a second output signal. The system is constructed and the method is provided for alternately operating in at least two time periods, wherein in one time period the first input signal, a low accuracy amplifier, and the first output signal are selectively coupled, and in another…

EFFICIENCY MEASURING CIRCUIT FOR DC-DC CONVERTER WHICH CALCULATES INTERNAL RESISTANCE OF SWITCHING INDUCTOR BASED ON DUTY CYCLE

Granted: June 30, 2011
Application Number: 20110156687
An efficiency measuring circuit may measure the efficiency of a DC-DC converter having a switching inductor with an internal DC resistance and a plurality of electronic switches that control current through the inductor. A duty cycle circuit may measure the duty cycle of current flowing through one of the electronic switches. A current sense circuit may measure the current flowing through one of the electronic switches. An inductor voltage sensor circuit may measure the voltage across…

CLEAN TRANSITION BETWEEN CCM AND DCM IN VALLEY CURRENT MODE CONTROL OF DC-TO-DC CONVERTER

Granted: June 23, 2011
Application Number: 20110148379
A valley current mode DC-to-DC converter may include an electronic control system configured to cause the DC-to-DC converter to operate under a continuous current mode and a discontinuous current mode. The electronic control system may include a current sensing system configured to sense current traveling through an inductance, a dual threshold generator configured to generate a first and a different second threshold, and a comparator system configured to compare current sensed by the…

CONTINUOUSLY SWITCHING BUCK-BOOST CONTROL

Granted: June 23, 2011
Application Number: 20110148373
A buck-boost converter with a switch controller may cause switches A, B, C, and/or D to cyclically close such that switches B and C are closed during at least one interval of each cycle during both the buck and boost modes of operation. The switch controller may in addition or instead cause switches A, B, C, and/or D to cyclically close based on a control signal such that switches A and D are closed during an interval of each cycle and such that these intervals are never both…