Method and system for clock edge synchronization of multiple clock distribution integrated circuits by configuring master device to produce at least one gated clock output signal
Granted: August 26, 2014
Patent Number:
8819472
Apparatus and method for clock edge synchronization among a plurality of devices. One of the plurality of devices is designated as a master device and one or more remaining devices as slave devices. The master device is configured for providing one or more gated master output clock signals based on a synchronization input signal and an input clock signal. The master device may be further configured to generate one or more gated master clock outputs to drive one or more slave devices, or…
Analog-to-digital converter system and method
Granted: August 19, 2014
Patent Number:
8810443
An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a…
Active bridge rectification
Granted: August 12, 2014
Patent Number:
8804389
Technique for controlling a circuit that converts an AC input voltage into a DC output voltage using transistors arranged in first and second transistor pairs. Each transistor of the first pair is controlled in accordance with polarity of the AC input voltage. Each transistor of the second pair is controlled based on a difference between the AC input voltage and the DC output voltage.
Voltage-mode band-gap reference circuit with temperature drift and output voltage trims
Granted: July 29, 2014
Patent Number:
8791683
A monolithic voltage reference circuit may include a voltage-mode band-gap reference circuit, a temperature independent differential current source, and a temperature dependent differential current source. The voltage-mode band-gap reference circuit may include an error amplifier having differential input nodes. The temperature independent differential current source may be configured to add in or subtract from the differential input nodes a substantially temperature independent…
Offset correction circuit for voltage-controlled current source
Granted: July 29, 2014
Patent Number:
8791644
Novel circuitry and methodology are provided for correcting the offset associated with a voltage-controlled current source. An offset correction circuit is coupled to the current source to prevent the output current produced by the current source from deviating from a desired level. The current source may include a transconductance amplifier or a chopper amplifier, and may be configured to produce a zero or non-zero value of the output current.
System and methods to improve the performance of semiconductor based sampling system
Granted: July 22, 2014
Patent Number:
8786318
Circuits and methods that improve the performance of electronic sampling systems are provided. Impedances associated with sampling semiconductor switches are maintained substantially constant during sample states, at least in part, by compensating for encountered input signal variations in order to reduce or minimize signal distortion associated with sampled signals that pass through the sampling switch.
Current mode voltage regulator with auto-compensation
Granted: July 22, 2014
Patent Number:
8786268
A method for automatically compensating a voltage regulator initially disconnects the error amplifier and compensation network from the feedback loop. A DC bias voltage is applied to the feedback loop to cause the regulator's output voltage to be at 90% of its nominal value. An AC perturbation signal is then added to the DC bias voltage to cause the output voltage to have a ripple at a frequency of the AC signal. The gain of the feedback loop and the phase difference between the AC…
Adjustable current limit switching regulator with constant loop gain
Granted: July 22, 2014
Patent Number:
8786265
A switching regulator is configured to provide a regulated voltage to a load while maintaining a substantially maximum output current limit, the switching regulator having a loop gain. In accordance with one aspect the switching regulator comprises: a circuit for adjusting the maximum output current limit in response to a programmable signal independently of the loop gain. In accordance with another aspect, the switching regulator comprises: a resistance sensing element for providing the…
Dynamic compensation of aging drift in current sense resistor
Granted: July 15, 2014
Patent Number:
8779777
A current sense resistor circuit may include a primary current sense resistor that drifts with age. A secondary current sense resistor may drift with age in substantial unison with the primary current sense resistor. A calibration resistor may not drift with age in substantial unison with the primary current sense resistor. A compensation circuit may compensate for aging drift in the resistance of the primary current sense resistor based on a comparison of the calibration resistor with…
Optimized bi-directional balancing method and system
Granted: July 1, 2014
Patent Number:
8766597
A battery balancing method and system which includes a plurality of cells connected in series, a balancer for each cell, a monitor configured to determine a state of charge (SOC) of each cell, and a microprocessor. The microprocessor iteratively calculates a SOC error for each cell, based on a theoretical balancing of the Min Q cell and the Max Q cell, until the SOC error is less than or equal to a first threshold; and iteratively re-calculates SOC error based on a net charge or…
Voltage regulator compensating for voltage drop along conductors between regulator output and load
Granted: June 17, 2014
Patent Number:
8754622
An automatic voltage compensation circuit in a voltage regulator compensates the output voltage for a voltage drop along lines leading to a remote load. A load capacitor is connected across the load for providing a low impedance across the load during a test phase of the regulator. In one embodiment, during the test phase, the load current is changed up or down a small percentage (e.g., 10%). As a result, the regulator voltage changes due only to the line resistance since the load is…
Common mode rejection ratio versus frequency in instrumentation amplifier
Granted: June 3, 2014
Patent Number:
8742848
A method of fabricating an instrumentation amplifier to have an improved common mode rejection ratio (CMRR) vs. frequency initially trims resistors in the input amplifiers of the instrumentation amplifier during a DC test, where the inputs are shorted and a DC voltage is applied, so that the output of the amplifier is approximately zero. This will normally cause the transconductances of the two input amplifiers to be different. Thus, the AC CMRR will degrade with frequency. Trimmable…
System and methods to improve the performance of semiconductor based sampling system
Granted: May 13, 2014
Patent Number:
8723556
Circuits and methods that improve the performance of electronic sampling systems are provided. Impedances associated with sampling semiconductor switches are maintained substantially constant during sample states, at least in part, by compensating for encountered input signal variations in order to reduce or minimize signal distortion associated with sampled signals that pass through the sampling switch.
System and methods to improve the performance of semiconductor based sampling system
Granted: April 15, 2014
Patent Number:
8698522
Circuits and methods that improve the performance of electronic sampling systems are provided. Impedances associated with sampling semiconductor switches are maintained substantially constant during sample states, at least in part, by compensating for encountered input signal variations in order to reduce or minimize signal distortion associated with sampled signals that pass through the sampling switch.
Controlling power received through multiple bus interfaces in a portable computing device
Granted: April 8, 2014
Patent Number:
8694803
The disclosed embodiments provide a system that enables a portable computing device to receive power through multiple bus interfaces at the same time. When the system senses that a first power source is plugged into a first bus interface in the portable computing device, the system determines whether the first power source is a host or a power adapter. Next, based upon whether the first power source is a host or a power adapter, the system uses a first power manager coupled to the first…
DC/DC converter with magnetic flux density limits
Granted: April 8, 2014
Patent Number:
8693215
A DC/DC converter may include a power stage circuit, a pulse generator circuit, a flux density monitor, and power control logic. The power stage circuit includes an input, an output, and a transformer with a core. The power stage circuit may be configured to operate in a power transfer phase during which power is transferred from the input to the output and a reset phase during which flux density in the core of the transformer is reduced. The pulse generator circuit may be configured to…
Circuit and methodology for high-speed, low-power level shifting
Granted: April 8, 2014
Patent Number:
8692576
A level shifting circuit and methodology involving a switching current generator responsive to switching of an input signal for producing a switching current to switch an output signal, and a holding current generator for producing a holding current to hold the logic level of the output signal in accordance with the logic level of the input signal. The holding current is produced independently of the switching current.
Stackable bi-directional multicell battery balancer
Granted: April 8, 2014
Patent Number:
8692516
A battery balancing system includes at least one sub-stack, each sub-stack comprising a plurality of cells connected in series. The system also includes a balancing module for each sub-stack comprising an independent bidirectional balancer for each cell in the sub-stack. The system includes a daisy chained stackable serial port. The balancing system senses a state of charge (SOC) of each cell in each sub-stack. The average SOC of the sub-stack is determined. For a weak cell, additional…
Dimmer-controlled LEDs using flyback converter with high power factor
Granted: April 8, 2014
Patent Number:
8692481
A flyback controller generates a switching signal for controlling delivery of current into a primary winding of a transformer in a flyback converter. The controller may include an output current monitoring circuit configured to generate a signal representative of an average output current in a secondary winding of the transformer based on a peak input current in the primary winding and a duty cycle of current in the secondary winding. The flyback controller may generate a switching…
Negative slope compensation for current mode switching power supply
Granted: April 1, 2014
Patent Number:
8686702
Generated are an error signal representative of a difference between a signal representative of the output voltage of a current mode switching power supply and a reference voltage, and a peak current threshold signal that is indicative of a peak current that should be reached in an inductor within the power supply during each cycle of a periodic clock signal and that has a level that is based on the error signal. A switch control signal regulates the voltage output of the power supply by…
