Circuits and methods for canceling signal dependent capacitance
Granted: March 23, 2010
Patent Number:
7683695
Systems and methods for reducing the magnitude of signal dependent capacitance are provided. Capacitance canceling circuitry is operative to generate cancellation capacitance in response to the magnitude of a signal, which may be the same signal that produces the undesired signal dependent capacitance, to at least partially cancel the signal dependent capacitance.
Single pass INL trim algorithm for networks
Granted: March 2, 2010
Patent Number:
7671770
A single-pass method of trimming a network, and a network manufactured according to the method, uses the assumption that the peak INL value is minimized by trimming all the structures in the network to a same target value based upon the boundary conditions of the discretely adjustable elements that make up the structures. Using this assumption, the number of targets that need to be simulated, can be greatly reduced making estimation of peak INL possible in a reasonable amount of testing…
Switching regulator with variable slope compensation
Granted: February 2, 2010
Patent Number:
7656142
Controlled compensation for a switching regulator is attained by detecting switching duty cycle of the switching regulator, developing a compensation signal having a time duration that is related to the detected switching duty cycle percentage, and generating a duty cycle control signal for the regulator that is dependent in part on the developed compensation signal. The compensation signal has a slope profile and is initiated during each switching cycle at a set point in the cycle that…
Method and system for determining a clock input mode
Granted: February 2, 2010
Patent Number:
7656216
A method and system is provided for clock input mode selection. When a signal provided on one of two clock input terminals is received, the received signal is considered in connection with a second input signal in order to determine whether the first input signal and the second input signal satisfy a pre-determined condition. Based on whether the pre-determined condition is met, a clock input mode is selected that indicates whether the clock input terminals provide a differential clock…
Method and system for bit polarization coding
Granted: February 2, 2010
Patent Number:
7656337
A method and system for converting a digital code. A digital signal is encoded to have a digital code having multiple binary bits. Substantially one half of the binary bits of the digital code is inverted to produce a modified digital code to reduce digital noise associated with the digital code.
Paralleling voltage regulators
Granted: January 5, 2010
Patent Number:
7642759
Circuits and methods for paralleling voltage regulators are provided. Improved current sharing and regulation characteristics are obtained by coupling control terminals of the voltage regulators together which results in precise output voltages and proportional current production. Distributing current generation among multiple paralleled voltage regulators improves heat dissipation and thereby reduces the likelihood that the current produced by the voltage regulators will be temperature…
Current source with indirect load current signal extraction
Granted: January 5, 2010
Patent Number:
7642762
A switching circuit for supplying current to a load has a switching element, an inductive element coupled to the switching element, and a load current extraction circuit responsive to current in the inductive element for producing a load current signal as a simulated current approximating current in the load.
Systems and methods for switch resistance control in digital to analog converters (DACs)
Granted: December 29, 2009
Patent Number:
7639168
A switch signal generator circuit that may form part of a digital to analog converter is provided. The switch signal generator circuit may include a first switch that controls a high reference gate voltage. The high reference gate voltage may provide the ON state voltage for a plurality of switches that control the coupling of a high reference voltage to the digital to analog converter. The switch signal generator circuit may include a second switch that controls a low reference gate…
Power sourcing equipment having auto-zero circuit for determining and controlling output current
Granted: December 29, 2009
Patent Number:
7639469
A novel system and methodology for controlling an output of Power Sourcing Equipment in a Power over Ethernet system based on a current limit threshold. The PSE has an auto-zero circuit for comparing a monitored output current of the PSE with the current limit threshold to control the output of the PSE.
Adaptive output current control for switching circuits
Granted: December 29, 2009
Patent Number:
7639517
System and methodology for controlling output current of switching circuitry having an input circuit and an output circuit electrically isolated from each other. A value of the output current may be determined based on input voltage, input current and reflected output voltage representing the voltage in the input circuit which corresponds to the output voltage. A switching element in the input circuit is controlled to produce the determined value of output current.
Adjustable minimum peak inductor current level for burst mode in current-mode DC-DC regulators
Granted: December 15, 2009
Patent Number:
RE41037
Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level for Burst Mode in current-mode DC-DC regulators. Minimum peak inductor current level control is achieved during Burst Mode by allowing external control for adjusting the burst threshold level. A single pin can be used to distinguish between forced continuous and Burst Mode as well as set the burst threshold level during Burst Mode, or an…
Method and apparatus for measuring the voltage of a power source
Granted: November 24, 2009
Patent Number:
7622893
Various concepts and techniques are disclosed for measuring the voltage of a power source. An apparatus includes a voltage metering circuit and a transformer having a first winding coupled to the voltage metering circuit and a second winding for coupling to a power source.
Square cell having wide dynamic range and power detector implementing same
Granted: November 24, 2009
Patent Number:
7622981
A square cell comprises first and second bipolar transistors each having an emitter, collector and base, the bases of the transistors being connected for receiving an input voltage, and first and second resistors in series with the first and second bipolar transistors respectively and with a source of reference voltage. The collectors are commonly connected to an output node to supply an output current having a component proportional to the square of the input voltage. Enhanced square…
Dual-mode detection of powered device in power over ethernet system
Granted: November 3, 2009
Patent Number:
7613936
Novel circuitry and methodology for detecting a Powered Device (PD) in a system for providing power to the PD. PD detection circuitry detects the PD in a first mode by providing detection current to probe the PD, and in a second mode by providing detection voltage to probe the PD. A control circuit determines that the PD is a valid device if the PD is detected both in the first mode and in the second mode.
Sawtooth oscillator having controlled endpoints and methodology therefor
Granted: September 1, 2009
Patent Number:
7583113
A controlled endpoint sawtooth waveform generator and methodology is implemented by a circuit that uses charge sharing between capacitors to produce a sawtooth having one or both endpoints that are suspended between the power supply rail and ground. The circuit may comprise a timing capacitor to which a charging source is coupled, and a switched capacitor coupled to the timing capacitor through a first controlled switch and to a source of switched capacitor reference voltage through a…
Single feedback input for regulation at both positive and negative voltage levels
Granted: August 25, 2009
Patent Number:
7579816
A voltage regulator provides a regulated output load voltage at either a positive level or an inverted level relative to an input supply voltage. A switching circuit and control circuit are formed on an integrated circuit having a single pin for coupling to regulator feedback signal. The feedback signal is applied directly to the feedback pin during both positive voltage level regulation and inverted voltage level regulation. The feedback signal may be produced by a feedback circuit…
High-power foldback mechanism in system for providing power over communication link
Granted: June 30, 2009
Patent Number:
7554783
A novel system for providing power over the Ethernet includes a current limit circuit for preventing an output current from exceeding a current threshold set at a prescribed level, and a foldback circuit for reducing the current threshold when an output voltage is lower than a prescribed voltage value. The foldback circuit may be controlled to operate in a high-power mode to increase the current threshold above the prescribed level.
Power management circuit and methodology for battery-powered systems
Granted: June 16, 2009
Patent Number:
7548041
A power management system including a battery-powered application, in which an input current is supplied by a source of current that may be a current-constrained source, such as a USB port, to a battery for charging the battery and to an application load. Battery charging current is supplied to the battery for a period of time based on magnitude of battery charging current, so that charging current of lesser magnitude is applied to the battery for a greater period of time. In accord with…
Common mode rejection ratio trim circuit and methodology
Granted: June 16, 2009
Patent Number:
7548115
An operational amplifier circuit includes an input differential circuit and a trim circuit for sensing the operational amplifier's input common mode voltage and generating an offset correction voltage in response thereto. The trim circuit reduces the amplifier's offset voltage dependence on input common mode voltage, and hence improves the common mode rejection ratio of the operational amplifier circuit.
Level shift delay equalization circuit and methodology
Granted: June 9, 2009
Patent Number:
7545173
Transition delays in a level shift circuit are equalized by generating a first signal related to the state of the input signal, a second signal inversely related to the state of the input signal, and a third signal that is reciprocal to the second signal. Upon transition of the input signal from a high state to a low state, the third signal is selected for controlling the output until the first signal attains a high state. The first signal is selected for controlling the output when it…
