Layout of dummy and active cells forming capacitor array in integrated circuit
Granted: January 9, 2007
Patent Number:
7161516
A capacitor array in an integrated circuit with active unit capacitor cells arranged amongst the dummy unit capacitor cells to provide visual and electrical symmetry. The electrical symmetry provides electrical matching between active unit capacitor cells and the visual symmetry provide process uniformity between the unit capacitor cells. Visual symmetry may be provided by uniform capacitor plate selection and uniform spacing between each. Electrical symmetry is provided by appropriately…
Systems and methods for using cascoded output switch in low voltage high speed laser diode and EAM drivers
Granted: December 5, 2006
Patent Number:
7145928
High frequency laser diode (LD) and electro-absorption modulator (EAM) integrated circuit drivers using a cascaded output switch architecture that increases the output current and voltage edge speed and reduces the peaking and ringing of the output waveform, thus improving the deterministic jitter performance. Also disclosed is a method and apparatus that provides a modulation current dependence of both turn-on and turn-off driving currents that lead to an optimal compromise between the…
High isolation switch buffer for frequency hopping radios
Granted: December 5, 2006
Patent Number:
7146149
A local oscillator (LO) circuit is disclosed which provides improved isolation between the unselected LO source and a mixer. The LO circuit includes a first LO source to generate a first periodic signal cycling at a first frequency, a second LO source to generate a second periodic signal cycling at a second frequency different than the first frequency, a limiter, a first switching element to selectively couple the first LO source to the limiter, and a second switching element to…
Chopper chopper-stabilized instrumentation and operational amplifiers
Granted: November 7, 2006
Patent Number:
7132883
Chopper chopper-stabilized instrumentation and operational amplifiers having ultra low offset. The instrumentation amplifiers use current-feedback, and include, in addition to a main chopper amplifier chain, a chopper stabilized loop for correcting for the offset of the input amplifiers for the input signal and for receiving the feedback of the output voltage sense signal. Additional loops, which may include offset compensation and autozeroing loops, may be added to compensate for…
Precision relaxation oscillator without comparator delay errors
Granted: September 19, 2006
Patent Number:
7109804
A relaxation oscillator for generating an oscillator output signal having a predetermined frequency. The relaxation oscillator includes an interleaved charge pump for providing a restoring charge to an integrator in response to at least one charge pump control signal. The relaxation oscillator further includes an integrator having an integrator input connected to the current summing node. The integrator is adapted to produce an integrator output signal having the predetermined frequency…
Phase distortion using MOS nonlinear capacitance
Granted: September 19, 2006
Patent Number:
7110718
RF phase distortion circuits and methods for controllably phase distorting an RF signal based on amplitude of the RF signal. An MOS device is provided having a body of a first conductivity type and at least one region of a second conductivity type in the body, with a conductive layer over at least part of the body and the region of the second conductivity type and insulated therefrom. The MOS device may be coupled into a phase distortion circuit individually or in back-to-back pairs and…
DC offset cancellation in a zero if receiver
Granted: September 19, 2006
Patent Number:
7110734
This invention describes how to quickly cancel DC offsets that are present in the two quadrature paths of a zero intermediate frequency transceiver. Previously known techniques are not suitable for the 5 GHz WLAN standards because of the very short transmit to receive turn around times and extraordinarily large dc offsets in these systems. This invention solves the above problems. The present invention uses both AC and DC coupling along with automatic gain control techniques to remove…
Process variation trim/tuning for continuous time filters and ?-? analog to digital converters
Granted: August 29, 2006
Patent Number:
7098730
Continuous time filters and ?-? analog to digital converters and methods for process variation trim/tuning. In feed forward filters, the resistance of feed forward transconductance elements are adjusted to compensate for process variation in the GM/SC values in the filters. Since all. GM/SC values are subject to the same RC process variation, and the resistance in all feed forward transconductance elements is also subject to the same R process variation, the resistance in the feed…
Broadband single conversion tuner integrated circuits
Granted: August 22, 2006
Patent Number:
7095454
A tunable receiver is disclosed including a plurality of select filters to perform an initial band selection, a variable-gain low noise amplifier (LNA) whose gain is controlled to prevent its output power level to exceed a pre-determined power threshold, a plurality of digitally-tunable tracking filters to pass signals within a selected channel and to reject signals in a corresponding image band, a second LNA to further amplify the received RF signal and to generate differential signal…
Data encryption for suppression of data-related in-band harmonics in digital to analog converters
Granted: June 27, 2006
Patent Number:
7068788
The present invention is related to digital to analog converter (DAC) input data encryption off-chip and decryption on-chip to suppress input data in-band harmonic leakage through package related parasitic capacitance. More specifically, the present invention relates to the method and apparatus of input data encryption off-chip by forming the logical exclusive-OR of the raw data and a random single bit data stream. The encrypted data is then read onto the DAC chip where the data is…
Single supply headphone driver/charge pump combination
Granted: June 13, 2006
Patent Number:
7061327
A headphone driver amplifier operative from a single DC voltage supply, coupled directly to the headphone speakers without the need for DC coupling capacitors used for preventing DC reaching the headphones. An onboard power supply generates a negative voltage rail which powers the output amplifiers, allowing driver amplifier operation from both positive and negative rails. Since the amplifiers can be biased at ground potential (0 volts), no significant DC voltage exists across the…
Integrated direct drive inductor means enabled headphone amplifier
Granted: June 13, 2006
Patent Number:
7061328
A headphone driver amplifier operative from a single DC voltage supply, coupled directly to the headphone speakers without the need for DC coupling capacitors used for preventing DC reaching the headphones. An onboard power supply generates a negative voltage rail which powers the output amplifiers, allowing driver amplifier operation from both positive and negative rails. Since the amplifiers can be biased at ground potential (O volts), no significant DC voltage exists across the…
Single wire interface for LCD calibrator
Granted: May 23, 2006
Patent Number:
7050027
A calibration circuit and related method for adjusting a common electrode voltage Vcom of a liquid crystal display (LCD) in response to commands received by way of a single-wire interface. The calibration circuit includes a controller to receive and interpret commands in the form of positive and negative pulses for respectively increasing and decreasing Vcom by a predetermined amount per pulse. The calibration circuit also includes a counter for generating a count related to Vcom,…
Image-rejection mixer having high linearity and high gain
Granted: May 9, 2006
Patent Number:
7043220
An integrated semiconductor image-rejection mixer having high linearity and high gain. In addition to the components of a classic image-rejection architecture, the present mixer has a high-frequency current-diverting stage that permits the operation of the output stage with high conversion gain and sufficient headroom for good linearity, even in cases where the supply voltage is relatively low (such as 3 V). The conversion gain of the mixer and its image-rejection performance can be…
Quadrature gain and phase imbalance correction in a receiver
Granted: April 25, 2006
Patent Number:
7035341
The present invention utilizes circuitry, already present in receivers, to calibrate and correct for gain and phase errors in a transceiver device. The present invention employs a digital signal processor along with multiple phase shifters and all pass networks to ensure proper levels of quadrature signals within the transceiver. An internally generated double sideband suppressed carrier signal is created to produce the calibration signals used by the digital signal processor.
Self-aligned NPN transistor with raised extrinsic base
Granted: April 11, 2006
Patent Number:
7026666
A self-aligned bipolar transistor and a method of formation thereof are provided. The bipolar transistor has a raised extrinsic base such that the link base resistance is reduced by providing an extrinsic base which is thicker than the intrinsic base. The increase in thickness of the extrinsic base provides a less resistive layer of the heavily doped base region. The method of forming the bipolar transistor includes depositing a first epitaxial layer on a substrate to form a base region…
High speed digital path for successive approximation analog-to-digital converters
Granted: April 11, 2006
Patent Number:
7026975
High speed digital path for successive approximation analog-to-digital converters wherein the successive approximation registers and the switch drivers are combined in set-reset latches having the switch drivers as latch outputs. This reduces the time of each successive approximation by reducing the ripple through time of each stage, thereby increasing the speed of operation of the analog-to-digital converters. As an option, the set-reset latches having the switch drivers as latch…
NMOS composite device Vds bootstrappers
Granted: March 28, 2006
Patent Number:
7019580
NMOS composite device Vds bootstrappers that mitigate the effects of decreased power supply rejection and increased channel length modulation in minimum or short channel length devices. The NMOS composite devices have a native or at least a low threshold device over a short channel device, with the gate of the native or low threshold device being controlled responsive to the input or output of the short channel device to clamp the drain—source voltage of the short channel device while…
System and method for modulation of non-data bearing carriers in a multi-carrier modulation system
Granted: March 28, 2006
Patent Number:
7020095
For one aspect of the invention, a method is described for mitigating power spectral density irregularities in a multi-carrier modulation environment. The method involves identifying at least one carrier of a plurality of carriers that is in a non-data bearing state. Thereafter, that carrier is modulated with random data.
Dynamic element matching in high speed data converters
Granted: February 21, 2006
Patent Number:
7002504
A method for providing dynamic element matching of capacitors in a pipelined analog to digital converter (ADC). Instead of randomizing the output of a flash ADC before providing the output of the ADC to the capacitor array, the threshold voltages from a reference ladder are randomized. This eliminates multiple, series connected switches of a randomizer between the output of a comparator bank and the capacitor array, and may be done during the time the output of the comparator bank of the…
