Maxim Integrated Patent Grants

Method and apparatus for multi-phase DC-DC converters using coupled inductors in discontinuous conduction mode

Granted: August 4, 2020
Patent Number: 10734904
A multiphase DC-DC converter includes a coupled inductor, N phases of the multiphase DC-DC converter, and a controller, where N is an integer greater than 2. The coupled inductor includes a plurality of inductors. Each inductor is coupled to two neighboring inductors or to rest of the inductors. The N phases of the multiphase DC-DC converter are respectively connected to the plurality of inductors. The controller operates the multiphase DC-DC converter in continuous conduction mode and…

Multi-level switching power converters including bypass transistors and associated methods

Granted: August 4, 2020
Patent Number: 10734898
A multi-level switching power converter includes a string of N upper transistors and a string of N lower transistors, where N is an integer greater than one. The N upper transistors are electrically coupled in series between a first power node and a switching node, and the N lower transistors are electrically coupled in series between the switching node and a reference node. The multi-level switching power converter further includes N?1 flying capacitors, an inductor, a bypass…

Battery chargers and associated systems and methods

Granted: August 4, 2020
Patent Number: 10734828
A method for charging a battery includes (a) applying a charging current pulse to the battery, (b) after the step of applying the charging current pulse to the battery, measuring a first voltage across the battery, (c) estimating an equilibrium voltage of the battery, (d) determining a Nernst voltage of the battery from a difference between the first voltage and the equilibrium voltage, and (e) controlling charging of the battery at least partially based on the Nernst voltage.

Optical sensor packaging system

Granted: July 28, 2020
Patent Number: 10727086
An optical sensor packaging system and method can include: providing an embedded substrate, the embedded substrate including an embedded chip coupled to a redistribution pad with a redistribution line connecting therebetween; mounting an optical sensor to the embedded substrate, the optical sensor including a photo sensitive material formed on a photo sensitive area of an active optical side of the optical sensor; wire-bonding the optical sensor to the embedded substrate with a first…

Current sense devices and associated methods

Granted: July 14, 2020
Patent Number: 10715136
A current sense device includes a reference transistor for electrically coupling to a power transistor, a sense transistor for electrically coupling to the power transistor, and control circuitry. The control circuitry is configured to (a) control current through the sense transistor such that a voltage at the sense transistor has a predetermined relationship to a voltage at the power transistor, and (b) control current through the sense transistor according to one or more operating…

Logic level shifter interface between power domains

Granted: June 16, 2020
Patent Number: 10684669
A logic level shifter interface including a string of logic components communicating between a first power domain and a second power domain; a first string of resistive components connecting a first power rail of the first power domain to a first power rail of the second power domain and having a plurality of intermediate first power rails at nodes between adjacent resistive components of the first string of resistive components; and a second string of resistive components connecting a…

Linear voltage regulators and associated methods

Granted: June 9, 2020
Patent Number: 10678282
A linear voltage regulator includes a series-pass element electrically coupled between an input node and an output node, current sense circuitry configured to generate a current sense signal representing at least magnitude of current flowing through the series-pass element, and control circuitry. The control circuitry is configured to control the series-pass element according to at least (a) the current sense signal and (b) a voltage sense signal representing magnitude of an output…

Systems and methods for operating secure elliptic curve cryptosystems

Granted: June 9, 2020
Patent Number: 10680819
Various embodiments of the invention implement countermeasures designed to withstand attacks by potential intruders who seek partial or full retrieval of elliptic curve secrets by using known methods that exploit system vulnerabilities, including elliptic operation differentiation, dummy operation detection, lattice attacks, and first real operation detection. Various embodiments of the invention provide resistance against side-channel attacks, such as sample power analysis, caused by…

Systems and methods for polarization control using blind source separation

Granted: June 9, 2020
Patent Number: 10680717
Analog signal processing systems and methods manage polarization in coherent optical receivers to eliminate the need for ultra-fast, power-hungry ADCs and DSPs and that require digitization of the full-bandwidth signal path and result in bulky and expensive circuit designs. Various embodiments an analog polarization correction circuit that implements the equivalent of two matrix operations by combining variable and unity gain amplifiers to align polarizations of input signals to generate…

Tamper detection countermeasures to deter physical attack on a security ASIC

Granted: June 9, 2020
Patent Number: 10678951
Various embodiments of the present invention relates generally to an integrated circuit, and more particularly, to systems, devices and methods of incorporating a tamper detection countermeasure into a security ASIC to deter physical attacks. The tamper detection countermeasure architects an active mesh to cover a sensitive area in the security ASIC. A plurality of time-varying random numbers is generated by a random number generator (RNG), and the active mesh is driven and configured…

Use of device assembly for a generalization of three-dimensional heterogeneous technologies integration

Granted: June 2, 2020
Patent Number: 10672748
A composite structure is a stack of thinned substrates each having a plurality of active devices of the same or different technologies. An assembled carrier substrate includes die assembled into cavities formed on the carrier substrate such that when the die rest within the cavity, a gap is formed between a bottom surface of the die and a bottom surface of the cavity. This gap removes contact stress applied to the bottom of the die. Another gap can also be formed above the die. Either…

Systems and methods for autoclave operating evaluation and verification

Granted: June 2, 2020
Patent Number: 10668177
Systems and methods are described for logging parameter data in autoclave operating cycles. The system has capacity to compensate the response delay to thereby accurately track the ambient gas parameters, such as temperature, pressure, humidity, sterilization gas density, within the autoclave during operation. By properly correcting for the thermal delay, the data accuracy of the measured gas temperature is thus greatly enhanced. Methods for evaluating and verifying autoclave operation…

Transistors with dual gate conductors, and associated methods

Granted: April 14, 2020
Patent Number: 10622452
A lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure and a vertical gate. The vertical gate includes (a) a first gate conductor and a second gate conductor each extending from a first outer surface of the silicon semiconductor structure into the silicon semiconductor structure in a thickness direction, (b) a first separation dielectric layer separating the first gate conductor from the second gate conductor within the vertical…

Exposed die sensor package

Granted: March 31, 2020
Patent Number: 10608125
Packaging techniques are described for fabricating an sensor package that include one or more sensor devices, such as optical sensors or light sources, where an active side of the sensor device is exposed. Additionally, the side of the sensor package including the sensor die is substantially flat (e.g., topology is less than about 75 ?m), the sensor package does not include wire bonding, and the package interconnect (e.g., solder bump array or other connection) is disposed on a side of…

H-field imager for assays

Granted: March 31, 2020
Patent Number: 10605816
This disclosure describes a magnetic-field image sensor and method of use. In accordance with implementations of the magnetic-field image sensor, a sample can be placed on top of the magnetic field image sensor. An image of the magnetic nanoparticles or superparamagnetic nanoparticles can be created immediately afterwards based upon detection of a change in magnetic field caused by the magnetic nanoparticles or superparamagnetic nanoparticles. From this image, computer imaging algorithms…

Self-aligned, dual-gate LDMOS transistors and associated methods

Granted: February 25, 2020
Patent Number: 10573744
A dual-gate, self-aligned lateral double-diffused metal-oxide-semiconductor (LDMOS) transistor includes a silicon semiconductor structure, a lateral gate including a first dielectric layer and a first conductive layer stacked on the silicon semiconductor structure in a thickness direction, and a vertical gate. The vertical gate includes a second dielectric layer and a second conductive layer disposed in a trench of the silicon semiconductor structure, the second dielectric layer defining…

Integrated standard-compliant data acquisition device

Granted: January 21, 2020
Patent Number: 10539625
An integrated standard-compliant data acquisition device includes an electrically insulating package including a plurality of conductive leads and an integrated circuit (IC) disposed within the electrically insulating package and electrically coupled to at least some of the plurality of conductive leads. The IC includes a first multiplexer (MUX), a second MUX, a third MUX, an analog-to-digital converter (ADC), a plurality of registers, a fourth MUX, control logic, and communication…

Resonant converter with negative current feedback

Granted: January 14, 2020
Patent Number: 10536095
A programmable, high efficiency resonant converter includes a resonant cell including a first capacitor and a first inductor, the resonant cell having a voltage output VOUT coupled to the first capacitor with a first switch and a first feedback input coupled to the first inductor; and a hard switching cell including a second capacitor and a second inductor, the hard switching cell having a second feedback input coupled to the second capacitor and a voltage output VX coupled to the second…

DC-to-DC converters capable of discontinuous conduction mode, and associated methods

Granted: January 14, 2020
Patent Number: 10536079
A method for discontinuous conduction mode operation of a multi-phase DC-to-DC converter includes (a) forward biasing a first inductor being magnetically coupled to a second inductor, (b) reverse biasing the first inductor after forward biasing the first inductor, (c) while reverse biasing the first inductor and before magnitude of current through the first inductor falls to zero, forward biasing the second inductor.

Low power ultra-wide-band transmitter

Granted: January 7, 2020
Patent Number: 10530421
Systems, devices and methods are disclosed for an ultra-wide-band (UWB) transmitter tag capable of operating in different power mode depending on voltage level and/or host interruption signal. The transmitter tag comprises a power management circuit, a one-time-programmable memory (OTP), a read/write memory, a state machine for controlling/monitoring the operation of the tag. The tag goes into the high power mode when the power supply ramps up to a preset voltage level. During the high…