Circuit and method for quickly turning off MOS device
Granted: March 4, 2008
Patent Number:
7339441
An OTA driving an MOS device needs to turn it off quickly to minimize overshoot during a heavy to light load state. The drains of the MOS device can be used to accelerate turning off the MOS device. A first drain is connected to the gate of the MOS device. A second drain is connected to a base of a bipolar device. The emitter of the bipolar device is connected to the MOS device gate. Notably, this bipolar device is active during the heavy to light load state. Therefore, any current…
In-loop duty corrector delay-locked loop for multiphase clock generation
Granted: February 12, 2008
Patent Number:
7330059
A delay-locked loop (DLL) employs an in-loop duty cycle corrector (DCC) to provide accurate multiphase clock generation with 50% duty cycle. Each delay cell can advantageously provide both delay and duty cycle correction functionality. In one embodiment, delay correction can precede duty cycle correction. The bandwidths of the DCC and the DLL can differ by a factor of a decade to achieve fast and stable operation.
Zero cancellation in multiloop regulator control scheme
Granted: January 29, 2008
Patent Number:
7323854
Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit…
Mutual-interpolating delay-locked loop for high-frequency multiphase clock generation
Granted: January 29, 2008
Patent Number:
7323918
A delay-locked loop (DLL) circuit with mutual-interpolating architecture that provides multiple-phase clock generation is presented. Each delay-cell in the DLL circuit delay chain is effectively an interpolator that combines two input clock signals: one input clock signal is received from the output clock of previous stage in the delay chain, and the other input clock signal is fed back from a following stage. Each delay cell supports the concurrent functions of delay and interpolation.…
Management system for hardware network devices
Granted: January 29, 2008
Patent Number:
7325060
A management system for supporting management functions of managed network devices is formed by a backend management network providing processing capability to handle management transactions. In one embodiment, the management system is coupled to a first and a second network element connected to a data communication network and being managed by a network manager also connected to the data communication network. The management system includes a management network coupled to the first and…
Providing accurate detection of chip overheat and local overheat conditions in integrated circuits
Granted: January 22, 2008
Patent Number:
7321484
A thermal shutdown system that can accurately detect a chip overheat condition or a local overheat condition is described. This system can include a first shutdown circuit triggered by the chip overheat condition and a second shutdown circuit triggered by the local overheat condition. The second shutdown circuit can be located near the heat-generating component on the IC. The first shutdown circuit can be located in another area of the IC. A common temperature independent signal, which…
Power FET with embedded body pickup
Granted: January 1, 2008
Patent Number:
7315052
A power transistor formed on a semiconductor substrate and including a lateral array of polysilicon lines separated by alternating source and drain regions includes one or more body contact diffusion regions formed in the source regions where each body contact diffusion region has a length that extends to the edges of the two adjacent polysilicon lines, and one or more body pickup contacts where each body pickup contact is formed over a respective body contact diffusion region. In one…
Clock-less serial data interface using a single pin
Granted: January 1, 2008
Patent Number:
7315585
A data communication method for receiving digital data on a data terminal includes receiving data pulses having a first pulse separation to represent a first logical data value and a second pulse separation to represent a second logical data value, generating a voltage ramp signal, resetting the voltage ramp signal at a first delay after the leading edge of each data pulse, regenerating the voltage ramp signal at a first time period after the resetting of the voltage ramp signal,…
Light emitting diode driver circuit
Granted: December 11, 2007
Patent Number:
7307614
Describe is a device for a multiplexing, output current-sensed, boost converter circuit which may be used as an LED driver. A boost converter LED driver circuit using a single set of passive external LC components for controlling the current through, and thus the output of, one and more than one bank of LEDs. The present invention allows for regulated current in one and more than one bank of LEDs by sensing current in the controller. The output voltage of a switcher adjusts it's level…
Switching voltage regulator with low current trickle mode
Granted: December 4, 2007
Patent Number:
7304464
For load currents greater than a threshold current, the voltage regulator operates in a conventional manner by fully turning on and off one or more switching transistors at a duty cycle necessary to maintain the output voltage a regulated voltage. Upon a load current below a threshold being detected, a controller stops the switching of the transistor(s) and applies a reduced drive signal to the high side transistor so as to apply a constant trickle current to the load. Unnecessary…
Right half-plane zero compensation and cancellation for switching regulators
Granted: November 20, 2007
Patent Number:
7298125
An improved method of canceling a RHPZ of a switching regulator can include detecting a predetermined error signal provided to a pulse width modulation (PWM) circuit, wherein the predetermined error signal is associated with the RHPZ. Once a RHPZ is detected, a ramp waveform provided to the PWM circuit can be temporarily lengthened, thereby canceling the RHPZ. Notably, temporarily lengthening the ramp waveform can be based on adjusting an RZ*CZ time constant. In one embodiment, the ramp…
Method of operating radio receiver implemented in a single CMOS integrated circuit
Granted: November 20, 2007
Patent Number:
7299029
A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in…
Timer circuit with adaptive reference
Granted: November 6, 2007
Patent Number:
7292084
A timer circuit includes a current mirror, a capacitor, a first switch, a resistor and a comparator. The current mirror receives a reference current and provides first and second currents with a predefined current ratio. The capacitor receives the first current as a sinking current or as a sourcing current. The first switch, controlled by a control signal, allows the capacitor to be charged by the first current or be discharged. The resistor is biased by the second current to provide an…
Box-in-box field-to-field alignment structure
Granted: September 25, 2007
Patent Number:
7273761
A lithographic pattern includes a first scribe along an edge of a die region, and a second scribe along an opposing edge of the die region. The first scribe includes at least a first translucent box and a second translucent box. The second scribe includes at least a first opaque box and a second opaque box defined respectively by a first translucent frame and a second translucent frame. When the lithographic pattern is stepped between fields on a wafer, the first translucent box is…
Method for signaling during a transaction and receiving unit and system for use therewith
Granted: September 18, 2007
Patent Number:
7272744
A transmitting device communicates a multi-level clock signal to a receiving device. Changes in the clock level may indicate the start or stop of a transmitting message or delineate fields in the transmitted message. The number of clock pulses received at a particular voltage may indicate further information about the message.
Gate layouts for transistors
Granted: September 4, 2007
Patent Number:
7265041
A transistor and a method of fabricating the transistor are provided. The transistor includes a semiconductor material comprising drain regions and source regions formed in alternating rows or columns. The transistor also includes polysilicon chains overlaying the top of the semiconductor material, disconnected from and substantially parallel to one another, and separating the drain regions from the source regions. The method includes providing a semiconductor material, growing a first…
Direct current multiplier
Granted: September 4, 2007
Patent Number:
7265527
A self-oscillating DCM is disclosed comprising two inductors that charge and discharge 180 degrees out of phase such that the charging inductor is conducting an upward ramping current and the discharging inductor is conducting a downward ramping current. A load receives the upward and downward ramping currents, which combine to create a constant current. The current source that powers the DCM is current limited so as to output a maximum direct current of IIN. A relatively small capacitor…
Video driver architecture for AMOLED displays
Granted: August 21, 2007
Patent Number:
7259521
An AMOLED display system, including an AMOLED display panel receiving a video signal, includes a video driver receiving the video signal and generating a video drive signal indicative of the video signal and referenced to a positive power supply voltage of the display panel, and a current driver coupled to an OLED pixel element receiving the video drive signal and the positive power supply voltage and providing a drive current to the OLED pixel element. The drive current is proportional…
Single-pin tracking/soft-start function with timer control
Granted: July 24, 2007
Patent Number:
7248026
A voltage regulator includes a voltage divider connected between a soft-start pin and the voltage regulator's error amplifier. The voltage divider has the same divider ratio as that of the voltage regulator's feedback voltage divider, which is used to divide the regulated output voltage fed back to the error amplifier. To facilitate soft-start operations, an external, user-supplied capacitor is connected to the soft-start pin. To facilitate voltage tracking operations, a predetermined…
Voltage-activated, constant current sink circuit
Granted: July 24, 2007
Patent Number:
7248097
Voltage-activated and accurate current sink, and method of providing same. In one aspect, a circuit for accurately sinking current includes a zener diode coupled to a power source at the cathode of the zener diode, and first and second transistors, where the first transistor has its collector coupled to the power source and its base coupled to the cathode of the zener diode, and the second transistor has its base coupled to the anode of the zener diode and its emitter coupled to ground.…
