Low area voltage regulator with feedforward noise cancellation of package resonance
Granted: November 24, 2020
Patent Number:
10845834
A linear regulator for applications with low area constraint resulting in limited load decoupling capacitance that introduces a compensating zero in the regulator loop to counteract the loss of phase margin and further introduces a feed-forward noise cancellation path operating over a wide frequency range covering a first package resonance frequency. The feed-forward path has low power consumption and improves the power-supply rejection ratio.
Method and system for gathering time-varying metrics
Granted: November 24, 2020
Patent Number:
10843084
Embodiments of the present invention provide a novel solution which can be used to detect and analyze instances of micro stutter within a given game, GPU and/or driver version. Embodiments of the present invention may be operable to divide an application session into a set of sub-sessions and perform multiple derivative calculations on time-varying application parameters (e.g., frame rates) measured during each sub-session. Embodiments of the present invention may also be operable to…
Digital media player
Granted: November 24, 2020
Patent Number:
D902882
Beamforming sweeping and training in a flexible frame structure for new radio
Granted: November 17, 2020
Patent Number:
10840982
The present application is at least directed to an apparatus on a network including a non-transitory memory including instructions stored thereon for beamforming training during an interval in the network. The apparatus also includes a processor, operably coupled to the non-transitory memory, capable of executing the instructions of receiving, from a new radio node, a beamforming training signal and beam identification for each of plural beams during the interval. The processor is also…
Stereoscopic rendering using raymarching and a virtual view broadcaster for such rendering
Granted: November 17, 2020
Patent Number:
10839591
The disclosure provides a virtual view broadcaster, a cloud-based renderer, and a method of providing stereoscopic images. In one embodiment, the method includes (1) generating a monoscopic set of rendered images and (2) converting the set of rendered images into a stereoscopic pair of images employing depth information from the monoscopic set of rendered images and raymarching.
Gaze tracking system for use in head mounted displays
Granted: November 17, 2020
Patent Number:
10838492
A gaze tracking system for use in head mounted displays includes an eyepiece having an opaque frame circumferentially enclosing a transparent field of view, light emitting diodes coupled to the opaque frame for emitting infrared light onto various regions of an eye gazing through the transparent field of view, and diodes for sensing intensity of infrared light reflected off of various regions of the eye.
Hybrid optics for near-eye displays
Granted: November 17, 2020
Patent Number:
10838459
A method for displaying a near-eye light field display (NELD) image is disclosed. The method comprises determining a pre-filtered image to be displayed, wherein the pre-filtered image corresponds to a target image. It further comprises displaying the pre-filtered image on a display. Subsequently, it comprises producing a near-eye light field after the pre-filtered image travels through a microlens array adjacent to the display, wherein the near-eye light field is operable to simulate a…
Data recovery technique for time interleaved receiver in presence of transmitter pulse width distortion
Granted: November 10, 2020
Patent Number:
10833681
This disclosure relates to a receiver comprising a clock and data recovery loop and a phase offset loop. The clock and data recovery loop may be controlled by a sum of gradients for a plurality of data interleaves. The phase offset loop may be controlled by an accumulated differential gradient for each of the data interleaves.
Method for continued bounding volume hierarchy traversal on intersection without shader intervention
Granted: November 3, 2020
Patent Number:
10825232
A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based…
Fast multi-scale point cloud registration with a hierarchical gaussian mixture
Granted: November 3, 2020
Patent Number:
10826786
Point cloud registration sits at the core of many important and challenging 3D perception problems including autonomous navigation, object/scene recognition, and augmented reality (AR). A new registration algorithm is presented that achieves speed and accuracy by registering a point cloud to a representation of a reference point cloud. A target point cloud is registered to the reference point cloud by iterating through a number of cycles of an EM algorithm where, during an Expectation…
Watertight ray triangle intersection
Granted: November 3, 2020
Patent Number:
10825230
A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a…
Scalable light-weight protocols for wire-speed packet ordering
Granted: October 27, 2020
Patent Number:
10820057
A communication method between a source device and a target device utilizes speculative connection setup between the source device and the target device, target-device-side packet ordering, and fine-grained ordering to remove packet dependencies.
Secure reconfiguration of hardware device operating features
Granted: October 27, 2020
Patent Number:
10817609
A secure reconfigurable operating mode system includes a hardware device having multiple operating modes and an operating mode selector that is coupled to the hardware device. The operating mode selector has a virtual fusing register that selects an operating mode for the hardware device and a security processor that enables a secure virtual fusing based on documented security files authorizing selection of the operating mode. A method of secure hardware device operating mode…
Dynamic partitioning of execution resources
Granted: October 27, 2020
Patent Number:
10817338
Embodiments of the present invention set forth techniques for allocating execution resources to groups of threads within a graphics processing unit. A compute work distributor included in the graphics processing unit receives an indication from a process that a first group of threads is to be launched. The compute work distributor determines that a first subcontext associated with the process has at least one processor credit. In some embodiments, CTAs may be launched even when there are…
Thread-level sleep in a multithreaded architecture
Granted: October 27, 2020
Patent Number:
10817295
A streaming multiprocessor (SM) includes a nanosleep (NS) unit configured to cause individual threads executing on the SM to sleep for a programmer-specified interval of time. For a given thread, the NS unit parses a NANOSLEEP instruction and extracts a sleep time. The NS unit then maps the sleep time to a single bit of a timer and causes the thread to sleep. When the timer bit changes, the sleep time expires, and the NS unit awakens the thread. The thread may then continue executing.…
Optimizing software-directed instruction replication for GPU error detection
Granted: October 27, 2020
Patent Number:
10817289
Software-only and software-hardware optimizations to reduce the overhead of intra-thread instruction duplication on a GPU or other instruction processor are disclosed. The optimizations trade off error containment for performance and include ISA extensions with limited hardware changes and area costs.
System and method for entering and exiting sleep mode in a graphics subsystem
Granted: October 27, 2020
Patent Number:
10817043
A technique is disclosed for a graphics processing unit (GPU) to enter and exit a power saving deep sleep mode. The technique involves preserving processing state within local memory by configuring the local memory to operate in a self-refresh mode while the GPU is powered off for deep sleep. An interface circuit coupled to the local memory is configured to prevent spurious GPU signals from disrupting proper self-refresh of the local memory. Spurious GPU signals may result from GPU power…
Spatio-temporal image metric for rendered animations
Granted: October 20, 2020
Patent Number:
10810455
An image processing method transforms image sequences into luminances, filters the luminances, determines the temporal differences between the luminances, performs a frequency domain transformation on the temporal differences, and applies a temporal contrast sensitivity function envelope integral to the frequency transform output to generate a temporal image metric. The temporal image metric may be applied for example to train a neural network or to configure a display device to depict a…
Method for forward progress tree traversal mechanisms in hardware
Granted: October 20, 2020
Patent Number:
10810785
In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service…
Techniques for preloading textures in rendering graphics
Granted: October 20, 2020
Patent Number:
10810784
Systems and methods for improved texture mapping and graphics processing are described. According to an example implementation, whole or parts of texture blocks are prefetched to an intermediate cache by a processing unit so that the same processing unit or another processing unit can subsequently obtain the prefetched texture block from the intermediate cache. Moreover, in some example implementations, control circuitry associated with the intermediate cache may throttle prefetch…
