Method and apparatus for securing and segregating host to host messaging on PCIe fabric
Granted: November 4, 2014
Patent Number:
8880771
A PCIe fabric includes at least one PCIe switch. The fabric may be used to connect multiple hosts. The PCIe switch implements security and segregation measures for host-to-host message communication. A management entity defines a Virtual PCIe Fabric ID (VPFID). The VPFID is used to enforce security and segregation. The fabric ID may be extended to be used in switch fabrics with other point-to-point protocols.
Dynamic buffer pool in PCIExpress switches
Granted: August 5, 2014
Patent Number:
8797857
In a first embodiment of the present invention, a method for handling a Transaction Layer Packets (TLPs) from devices in a switch is provided, the method comprising: subtracting a first number of credits from a credit pool associated with a first port on which a first device is connected; determining if the amount of credits in the credit pool associated with the first port is less than a first predetermined threshold; and if the amount of credits in the credit pool associated with the…
Multiple seal-ring structure for the design, fabrication, and packaging of integrated circuits
Granted: July 22, 2014
Patent Number:
8785246
A semiconductor circuit design includes an outer seal-ring and an inner seal-ring for each sub-section of the design that may potentially be cut into separate die. The use of multiple seal-rings permits a single circuit design and fabrication run to be used to support flexibly packaging different product releases having different numbers of integrated circuit blocks per packaged unit.
Transfer of commands and storage data to a data storage device
Granted: May 27, 2014
Patent Number:
8738812
A controller controls transfer of commands and storage data over a databus to a data storage device. The controller comprises a memory arranged to store a queue of commands prior to the commands being transferred over the databus. The controller identifies data access commands in the queue that specify the same type of data access and contiguous ranges of addresses. A concatenated data access command is transferred in place of so identified data access commands, the concatenated data…
Parallel packetized interconnect with simplified data link layer
Granted: March 25, 2014
Patent Number:
8683285
In a first embodiment of the present invention, a method for error-correcting in a parallel interconnect transmitting device is provided, the method comprising: detecting a frame transition in a transmission from the transmitting device to a parallel interconnect receiving device; tracking time between the frame transition and a transition of a response signal corresponding to the frame transition received from the receiving device; detecting an error in the transmission; and restarting…
Sharing multiple virtual functions to a host using a pseudo physical function
Granted: February 4, 2014
Patent Number:
8645605
A method is provided comprising: enumerating a group of available virtual functions corresponding to the physical function; mapping the group of available virtual functions to a non-transparent port of the switch by creating a copy of a configuration space for the physical function while assigning unique vendor and device identifications for different classes of devices, wherein the mapping creates a pseudo physical function exposing a subset of the SR-IOV capability from the…
Single pipe non-blocking architecture
Granted: October 8, 2013
Patent Number:
8554976
A method for processing an incoming command destined for a target is provided, comprising: determining if the incoming command is a data command or a management command; forwarding the incoming command to a storage management component of the target when the incoming command is a management command; when the incoming command is a data command: determining if a disk command queue on the target is full; sending the incoming command to the disk command queue when the disk command queue is…
Three dimensional fat tree networks
Granted: October 8, 2013
Patent Number:
8553683
In a first embodiment of the present invention, a non-blocking switch fabric is provided comprising: a first set of intra-domain switches; a second set of intra-domain switches; a set of inter-domain switches located centrally between the first set of intra-domain switches and the second set of intra-domain switches, wherein each of the ports of each of the inter-domain switches is connected to an intra-domain switch from the first or second set of intra-domain switches.
Dynamic host clock compensation
Granted: October 1, 2013
Patent Number:
8548011
In accordance with a first embodiment of the present invention, a method for improving synchronization of communications between a first port and a second port is provided, the method performed at the first port and comprising: inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level; detecting a lack of synchronization between the first port and the second port;…
Supporting global input/output interconnect features on ports of a midpoint device
Granted: September 24, 2013
Patent Number:
8543890
In a first embodiment of the present invention, a method for operating a midpoint device utilizing an Input/Output (I/O) interconnect is provided, wherein the midpoint device contains a plurality of ports, the method comprising: receiving a request to initiate a session between a device on a first port of the midpoint device and a device on a second port of the midpoint device; retrieving information regarding whether the first port supports a feature, and information regarding whether…
Multi-root sharing of single-root input/output virtualization
Granted: August 27, 2013
Patent Number:
8521941
In a first embodiment of the present invention, a method for multi-root sharing of a plurality of single root input/output virtualization (SR-IOV) endpoints is provided, the method comprising: CSR redirection to a management processor which either acts as a proxy to execute the CSR request on behalf of the host or filters it and performs an alternate action, downstream routing of memory mapped I/O request packets through the switch in the host's address space and address translation with…
USB 3 bridge with embedded hub
Granted: August 6, 2013
Patent Number:
8504755
A bridge device for connecting a USB 3 host device with a plurality of downstream, non-USB 3 mass storage devices, such as SATA or PATA devices. The bridge device comprises an embedded hub having a plurality of internal USB 3 devices. The internal USB 3 devices do not have a physical USB 3 interface. The bridge device also has at least one downstream physical non-USB 3 device, to which a mass storage device may be attached. The internal USB 3 devices enable the host device to be…
Writing of data on an array of storage devices with controlled granularity
Granted: June 18, 2013
Patent Number:
8468301
A disk array control apparatus controls writing of data onto an array of N storage devices such as disk drives, where N is an integer of 3 or greater. Each storage device writes data with a granularity of a sector having a predetermined sector size. The apparatus writes data with a granularity of a transfer unit having a transfer size which is T times the sector size, where T is a plural integer greater than (N?1). The apparatus is allows writing to an array of storage devices for which…
In-band generation of low-frequency periodic signaling
Granted: June 4, 2013
Patent Number:
8457247
In a first embodiment of the present invention, a method for communicating main and auxiliary data over a transmission medium is provided, the method comprising: generating a low-frequency output pattern using a high-frequency oscillator, wherein the low-frequency output pattern contains the auxiliary data encoded in a first scheme, wherein the first scheme resembles an output pattern that would be generated by a low-frequency oscillator; sending the low-frequency output pattern through…
Adjusting system clock to faster speed upon receiving mass storage command and back to lower speed upon completion of all commands
Granted: April 9, 2013
Patent Number:
8417985
In a first embodiment of the present invention, a method for dynamically adjusting a system clock of a plurality of system clock-controlled components in a system is provided, the method comprising: detecting the receipt of a command at a non-system clock-controlled component of the system; and adjusting the system clock to a fast speed based on the detecting. This embodiment may also include: determining that the command has been completed; determining that there are no outstanding…
Generating unique random numbers for multiple instantiations
Granted: February 5, 2013
Patent Number:
8370411
In a first embodiment of the present invention, a method for generating a random number for an instance of a hardware description language definition is provided, the method comprising: generating a unique signature for the instance; applying a message digest generation process on the unique signature to arrive at a message digest having a fixed length; and applying a random number generation process on the message digest.
Automatic reference frequency compensation
Granted: December 11, 2012
Patent Number:
8332681
In a first embodiment of the present invention, a method for operating a device having a device reference clock, in a system including a host with a host reference clock is provided, the method comprising: beginning a link negotiation stage between the device and the host using the device reference clock; during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock; applying the frequency offset to the device…
Automatic port accumulation
Granted: December 4, 2012
Patent Number:
8327042
In a first embodiment of the present invention, a method for configuring a plurality of input/output (I/O) interconnect switch ports is provided, the method comprising: starting a link training and status state machine (LTSSM) for each of the plurality of ports; placing each of the LTSSMs in a receiver detect state; changing all of the LTSSMs to a polling state only once receivers are detected or timeouts occur in the receiver detect states in each of the LTSSMs; changing all of the…
Reducing transmit signal components of a receive signal of a transceiver
Granted: October 23, 2012
Patent Number:
8295214
Embodiments of a method and apparatus of reducing transmit signal components of a receive signal of a transceiver are disclosed. One method includes generating a transmit signal by passing a pre-driver transmit signal through a transmit driver. An echo cancellation signal is generated by passing the pre-driver transmit signal through an echo cancellation driver. A residual echo signal is generated by passing a pre-driver residual echo cancellation signal through a residual echo…
Tranceiver non-linearity cancellation
Granted: October 2, 2012
Patent Number:
8279912
Embodiments of a method and apparatus for reducing non-linear transmit signal components of a receive signal of a transceiver signal are disclosed. The method includes the transceiver simultaneously transmitting a transmit signal, and receiving the receive signal. A non-linear replica signal of non-linear transmission signal components that are created in the transceiver by a transmit signal DAC, and imposed onto the receive signal, is generated. The non-linear replica signal is…
