POWER CONVERTER WITH COMPENSATION CIRCUIT FOR ADJUSTING OUTPUT CURRENT PROVIDED TO A CONSTANT LOAD
Granted: August 22, 2013
Application Number:
20130214702
A method for use in a power converter includes generating a peak input voltage signal that is representative of a peak value of the input voltage for phase angles less than a phase angle threshold and is representative of a value that is less than the peak value of the input voltage for phase angles greater than the phase angle threshold. The method also includes controlling a switching of a switch to regulate an output current of the power converter in response to the peak input voltage…
Power Integrated Circuit with Incorporated Sense FET
Granted: August 15, 2013
Application Number:
20130207192
In one embodiment, a power integrated circuit device includes a main lateral high-voltage field-effect transistor (HVFET) and an adjacently-located lateral sense FET, both of which are formed on a high-resistivity substrate. A sense resistor is formed in a well region disposed in an area of the substrate between the HVFET and the sense FET. A parasitic substrate resistor is formed in parallel electrical connection with the sense resistor between the source regions of the HVFET and the…
FLYBACK CONVERTER WITH FORWARD CONVERTER RESET CLAMP
Granted: August 1, 2013
Application Number:
20130194835
A power supply includes a forward converter having a first transformer coupled to an input of the power supply and to a first voltage output. The power supply also includes a separate flyback converter having a second transformer that is coupled to the input and to a second voltage output. A clamp reset circuit is coupled to the first transformer and to the second transformer. The clamp reset circuit includes a capacitor and a voltage limiting element. The voltage limiting element is…
POWER SYSTEM WITH SHARED CLAMP RESET
Granted: August 1, 2013
Application Number:
20130194834
An example power supply includes a first power converter, a second power converter, and a shared clamp reset circuit. The first power converter is adapted to convert an input to a first voltage output and includes a first diode and a first transformer having a first primary winding. The second power converter is adapted to convert the input to a second voltage output and includes a second diode and a second transformer having a second primary winding. The shared clamp reset circuit is…
LED DIMMING CIRCUIT FOR SWITCHED DIMMING
Granted: August 1, 2013
Application Number:
20130193864
A light emitting diode (LED) dimming module includes an energy storage circuit, a load interface circuit, and a switch circuit. The energy storage circuit provides a substantially continuous current in response to a converter current. The load interface circuit provides a modulated load current in response to the continuous current. The switch circuit, which is operatively coupled to the load interface circuit, switches in accordance with a duty cycle. The modulated load current is based…
High-Voltage Vertical Transistor With a Varied Width Silicon Pillar
Granted: July 25, 2013
Application Number:
20130187219
In one embodiment, a vertical HVFET includes a pillar of semiconductor material a pillar of semiconductor material arranged in a loop layout having at least two substantially parallel and substantially linear fillet sections each having a first width, and at least two rounded sections, the rounded sections having a second width narrower than the first width, a source region of a first conductivity type being disposed at or near a top surface of the pillar, and a body region of a second…
FEED FORWARD IMBALANCE CORRECTOR CIRCUIT
Granted: July 18, 2013
Application Number:
20130181624
A circuit includes a first active device is coupled between a third terminal and a second terminal. The first active device has a control terminal coupled a first terminal to receive a signal representative of a rectified input voltage. A second active device is coupled between the control terminal of the first active device and the second terminal. The second active device has a control terminal coupled to a fourth terminal. The second active device is coupled to be controlled in…
METHOD AND APPARATUS FOR SENSING MULTIPLE VOLTAGE VALUES FROM A SINGLE TERMINAL OF A POWER CONVERTER CONTROLLER
Granted: July 4, 2013
Application Number:
20130170251
A controller for use in a power converter includes a sensor coupled to receive a signal from a single terminal of the controller. The signal from the single terminal represents an output voltage of the power converter during at least a portion of an off time of a power switch and a line input voltage during a portion of an on time of the power switch. A switching control is to be coupled to switch the power switch to regulate the output of the power converter in response to the sensor. A…
GENERATING A FAST RESET-SIGNAL USING A FAULT-PROTECTION LATCH
Granted: June 20, 2013
Application Number:
20130155733
Methods and apparatuses are disclosed for monitoring an ac input for fault conditions. The ac input may be monitored by a latch-reset that uses the ac input to charge a line detection capacitor. The latch-reset may be configured such that the voltage at one end of the line detection capacitor drops below a line detection threshold voltage when the ac input is removed for longer than an allowable period of time or if the voltage of the ac input falls below an acceptable value. The drop in…
Composite wafer for fabrication of semiconductor devices
Granted: June 20, 2013
Application Number:
20130157440
A composite wafer includes a first substrate having a first vertical thickness and a top surface, the top surface being prepared in a state for subsequent semiconductor material epitaxial deposition. A carrier substrate is disposed beneath the first substrate. The carrier substrate has a second vertical thickness greater than the first vertical thickness. An interlayer bonds the first substrate to the carrier substrate.
DETECTING OUTPUT DIODE CONDUCTION TIME FOR CABLE DROP COMPENSATION OF A POWER CONVERTER
Granted: June 20, 2013
Application Number:
20130155724
An example controller for a power converter to provide power to a load through a distribution network includes a control circuit and a cable drop compensator. The control circuit outputs a drive signal to control switching of a switch to regulate an output of the power converter in response to a feedback signal. The cable drop compensator is coupled to adjust the feedback signal in response to a conduction time of an output diode of the power converter to compensate for a distribution…
ENHANCEMENT-MODE HFET CIRCUIT ARRANGEMENT HAVING HIGH POWER AND A HIGH THRESHOLD VOLTAGE
Granted: June 13, 2013
Application Number:
20130146891
A circuit includes input drain, source and gate nodes. The circuit also includes a group III nitride enhancement-mode HFET having a source, drain and gate and a voltage shifter having a first terminal connected to the gate of the enhancement mode HFET at a common junction. The circuit also includes a load resistive element connected to the common junction. The drain of the enhancement-mode HFET serves as the input drain node, the source of the enhancement-mode HFET serves as the input…
CONTROLLER WITH PUNCTUATED SWITCHING CONTROL CIRCUIT
Granted: June 6, 2013
Application Number:
20130141955
An example controller for use in a power supply includes a zero crossing detection (ZCD) circuit, a threshold detection circuit, and a punctuated switching control circuit. The ZCD circuit generates a ZCD signal that pulses each zero-crossing of an ac input voltage. The threshold detection circuit receives and compares an output of the power supply with a threshold reference. The punctuated switching control circuit generates a switching signal to control a switch to regulate the output…
METHOD AND APPARATUS FOR IMPLEMENTING AN UNREGULATED DORMANT MODE WITH OUTPUT RESET IN A POWER CONVERTER
Granted: June 6, 2013
Application Number:
20130141948
A control circuit includes a feedback circuit, a drive signal generator, an unregulated dormant mode and output reset control circuit, and a counter. The feedback circuit generates an enable signal and in response, the drive signal generator regulates the output of the power converter. The unregulated dormant mode and output reset control circuit powers down the drive signal generator such that the regulation is ceased when the energy requirement at the output has fallen below a…
GaN high voltage HFET with passivation plus gate dielectric multilayer structure
Granted: June 6, 2013
Application Number:
20130140605
A method of fabricating a multi-layer structure for a power transistor device includes performing, within a reaction chamber, a nitrogen plasma strike, resulting in the formation of a nitride layer directly on a nitride-based active semiconductor layer. A top surface of the nitride layer is then exposed to a second source. A subsequent nitrogen-oxygen plasma strike results in the formation of an oxy-nitride layer directly on the nitride layer. The nitride layer comprises a passivation…
JUNCTION BARRIER SCHOTTKY RECTIFIERS HAVING EPITAXIALLY GROWN P+-N JUNCTIONS AND METHODS OF MAKING
Granted: June 6, 2013
Application Number:
20130140585
A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p+-n junctions and self-planarizing epitaxially over-grown second n-type drift regions between and, optionally, on top of the p-type regions. The device may include an edge termination structure such as an exposed or buried P+ guard ring, a regrown or implanted junction termination extension (JTE)…
APPARATUS AND METHOD FOR SENSING OF ISOLATED OUTPUT
Granted: May 23, 2013
Application Number:
20130128625
A power converter includes a current controller coupled to an energy transfer element to selectively enable a first, second or third current in the current controller. The first current is substantially zero, the second current is greater than the third current, and the third current is greater than the first current. The third current only partially discharges a capacitance coupled to the energy transfer element and the current controller. A control circuit is to be coupled to the…
METHOD AND APPARATUS TO REGULATE AN OUTPUT VOLTAGE OF A POWER CONVERTER AT LIGHT/NO LOAD CONDITIONS
Granted: May 16, 2013
Application Number:
20130121040
An example controller for a primary side control power converter includes a feedback circuit, a driver circuit, and an adjustable voltage reference circuit. The feedback circuit compares a feedback signal representative of a bias winding voltage of the power converter with a voltage reference. The driver circuit outputs a switching signal having a switching period to control a switch to regulate an output of the power converter in response to the feedback signal and enables or disables a…
ULTRA LOW STANDBY CONSUMPTION IN A HIGH POWER POWER CONVERTER
Granted: May 16, 2013
Application Number:
20130121035
A power converter includes a dc input having first and second terminals. A main converter is coupled to the first terminal of the dc input. A standby circuit coupled to the second terminal of the dc input and the main converter. The main converter is coupled to control a transfer of energy from the dc input through the standby circuit to a main output of the main converter during a normal operating condition of the power supply. The standby circuit is coupled to decouple the main…
CONTROLLER COMPENSATION FOR FREQUENCY JITTER
Granted: May 2, 2013
Application Number:
20130106379
A controller for use in a power supply includes a drive signal generator, a jitter signal generator, a compensator signal generator, and an arithmetic operator. The drive signal generator is coupled to output a drive signal in response to an input signal. The jitter signal generator is coupled to provide a jitter signal that is representative of a first percentage amount to modulate a switching period of the drive signal. The compensator signal generator is coupled to provide a…
