Method For Making Magnetic Components With M-Phase Coupling, And Related Inductor Structures
Granted: September 5, 2013
Application Number:
20130229249
An M phase coupled inductor includes a magnetic core including a first end magnetic element, a second end magnetic element, and M legs disposed between and connecting the first and second end magnetic elements. M is an integer greater than one. The coupled inductor further includes M windings, where each winding has a substantially rectangular cross section. Each one of the M windings is at least partially wound about a respective leg.
Method For Making Magnetic Components With M-Phase Coupling, And Related Inductor Structures
Granted: August 29, 2013
Application Number:
20130222099
An M phase coupled inductor includes a magnetic core including a first end magnetic element, a second end magnetic element, and M legs disposed between and connecting the first and second end magnetic elements. M is an integer greater than one. The coupled inductor further includes M windings, where each winding has a substantially rectangular cross section. Each one of the M windings is at least partially wound about a respective leg.
VIRTUAL OUTPUT VOLTAGE SENSING FOR FEED-FORWARD CONTROL OF A VOLTAGE REGULATOR
Granted: August 15, 2013
Application Number:
20130207627
Disclosed are devices, apparatus, circuitry, components, mechanisms, modules, systems, and methods for virtual output voltage sensing for feed-forward control of a voltage regulator. A buffer has an input coupled to sense a monitored signal indicating a duty cycle of switch circuitry coupled to an output filter of the voltage regulator. The buffer is configured to provide at an output, responsive to the monitored signal, a buffer output signal having a high reference voltage for a high…
LATERAL DOUBLE-DIFFUSED MOSFET
Granted: August 8, 2013
Application Number:
20130200452
A LDMOS transistor is implemented in a first impurity region on a substrate. The LDMOS transistor has a source that includes a second impurity region. The second impurity region is implanted into the surface of the substrate within the first impurity region. Additionally, the LDMOS transistor has a drain that includes a third impurity region. The third impurity region is implanted into the surface of the substrate within the first impurity region. The third impurity region is spaced a…
Method For Making Magnetic Components With M-Phase Coupling, And Related Inductor Structures
Granted: July 25, 2013
Application Number:
20130187737
An M phase coupled inductor includes a magnetic core including a first end magnetic element, a second end magnetic element, and M legs disposed between and connecting the first and second end magnetic elements. M is an integer greater than one. The coupled inductor further includes M windings, where each winding has a substantially rectangular cross section. Each one of the M windings is at least partially wound about a respective leg.
DC TO DC CONVERTER DESIGNED TO MITIGATE PROBLEMS ASSOCIATED WITH LOW DUTY CYCLE OPERATION
Granted: June 20, 2013
Application Number:
20130154589
DC to DC converters are described that include two converters interconnected and operated to mitigate at least some of the effects of low duty cycle operation.
Vertical Gate LDMOS Device
Granted: May 9, 2013
Application Number:
20130115744
A method of fabricating a vertical gate region in LDMOS transistor includes depositing a first masking layer on an n-well region implanted on a substrate, patterning the first masking layer to define an area, depositing a second masking layer over the area, etching through the second masking layer in a first portion of the area to expose the n-well region, and etching the exposed n-well region to form a first trench. The first trench, extending from a surface of the n-well region to a…
Method For Making Magnetic Components With N-Phase Coupling, And Related Inductor Structures
Granted: May 9, 2013
Application Number:
20130113596
Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single…
INTEGRATED PHOTOVOLTAIC PANEL WITH SECTIONAL MAXIMUM POWER POINT TRACKING
Granted: May 2, 2013
Application Number:
20130106194
An integrated photovoltaic panel has one or more integral DC-DC converter circuits. The DC-DC converter input port couples to a section of at least one photovoltaic (PV) device of the panel separate from PV devices feeding other converters. The converter has an MPPT controller for operating the converter to transfer maximum power from coupled photovoltaic devices to its output port. The PV panel has a transparent substrate to which PV devices are mounted. A laminating material seals PV…
Vertical Gate LDMOS Device
Granted: May 2, 2013
Application Number:
20130109143
The present application features methods of fabricating a gate region in a vertical laterally diffused metal oxide semiconductor (LDMOS) transistor. In one aspect, a method includes depositing a masking layer on an n-well region implanted on a substrate, patterning the masking layer to define an area, and forming a first trench in the area such that a length of the first trench extends from a surface of the n-well region to a first depth in the n-well region. The method also includes…
Transistor with Buried P+ and Source Contact
Granted: May 2, 2013
Application Number:
20130105888
The present application features a transistor that includes an n-well region implanted into a surface of a substrate, a gate region, and a source region, and a drain region. The source region is on a first side of the gate region and includes a p-body region in the n-well region. An n+ region and a p+ region are implanted in the p-body region such that the p+ region is below the n+ region. The drain region is on a second side of the gate region and includes an n+ region.
Vertical Gate LDMOS Device
Granted: May 2, 2013
Application Number:
20130105887
Described here are transistors and fabrication methods thereof. In one implementation, a transistor includes an n-well region implanted into a surface of a substrate, and a trench in the n-well region. The trench extends from the surface to a first depth. The trench includes a gate of conductive material in the trench, and dielectric material filling a volume of the trench not filled by the conductive material. The transistor also includes a p-type material in a first region extending…
Asymmetrical Coupled Inductors And Associated Methods
Granted: April 18, 2013
Application Number:
20130093408
An asymmetrical coupled inductor includes a first and a second winding and a core. The core is formed of a magnetic material and magnetically couples together the windings. The core is configured such that a leakage inductance value of the first winding is greater than a leakage inductance value of the second winding. The coupled inductor is included, for example, in a multi-phase DC-to-DC converter. A DC-to-DC converter including a symmetrical coupled inductor includes at least one…
POWER MANAGEMENT APPLICATIONS OF INTERCONNECT SUBSTRATES
Granted: April 11, 2013
Application Number:
20130087366
Various applications of interconnect substrates in power management systems are described.
Method For Making Magnetic Components With M-Phase Coupling, And Related Inductor Structures
Granted: March 21, 2013
Application Number:
20130069755
An M phase coupled inductor includes a magnetic core including a first end magnetic element, a second end magnetic element, and M legs disposed between and connecting the first and second end magnetic elements. M is an integer greater than one. The coupled inductor further includes M windings, where each winding has a substantially rectangular cross section. Each one of the M windings is at least partially wound about a respective leg.
DC TO DC CONVERTER WITH RIPPLE CANCELLATION
Granted: December 20, 2012
Application Number:
20120319478
Ripple cancellation techniques are described for various DC to DC converters having multiple parallel phases with magnetically coupled inductors.
INTEGRATED PROTECTION DEVICES WITH MONITORING OF ELECTRICAL CHARACTERISTICS
Granted: November 22, 2012
Application Number:
20120293017
Disclosed are systems, devices, circuits, components, mechanisms, and processes in which a switching mechanism can be coupled between components. The switching mechanism is configured to have an on state or an off state, where the on state allows current to pass along a current path. A monitoring mechanism has one or more sensing inputs coupled to sense an electrical characteristic at the current path. The electrical characteristic can be a current, voltage, and/or power by way of…
Method of Fabricating A Semicoductor Device Having A Lateral Double Diffused Mosfet Transistor with a Lightly Doped Source and a CMOS Transistor
Granted: March 29, 2012
Application Number:
20120074492
Methods and systems for monolithically fabricating a lateral double-diffused MOSFET (LDMOS) transistor having a source, drain, and a gate on a substrate, with a process flow that is compatible with a CMOS process flow are described.
Switching Circuits For Extracting Power From An Electric Power Source And Associated Methods
Granted: February 23, 2012
Application Number:
20120043823
A switching circuit for extracting power from an electric power source includes (1) an input port for electrically coupling to the electric power source, (2) an output port for electrically coupling to a load, (3) a first switching device configured to switch between its conductive state and its non-conductive state to transfer power from the input port to the output port, (4) an intermediate switching node that transitions between at least two different voltage levels at least in part…
Switching Circuits For Extracting Power From An Electric Power Source And Associated Methods
Granted: February 23, 2012
Application Number:
20120043818
An electric power system includes N electric power sources and N switching circuits, where N in an integer greater than one. Each switching circuit includes an input port electrically coupled to a respective one of the N electric power sources, an output port, and a first switching device adapted to switch between its conductive and non-conductive states to transfer power from the input port to the output port. The output ports of the N switching circuits are electrically coupled in…
