Volterra Semiconductor Patent Grants

Method for making magnetic components with N-phase coupling, and related inductor structures

Granted: June 29, 2010
Patent Number: 7746209
Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single…

Voltage regulator with inductor banks

Granted: March 30, 2010
Patent Number: 7688607
A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes one or more slaves, and each slave includes a switching circuit which serves as a power switch for alternately coupling and decoupling the input terminal to an intermediate node. The voltage regulator…

Lateral double-diffused MOSFET transistor with a lightly doped source

Granted: March 2, 2010
Patent Number: 7671411
Methods and systems for monolithically fabricating a lateral double-diffused MOSFET (LDMOS) transistor having a source, drain, and a gate on a substrate, with a process flow that is compatible with a CMOS process flow are described.

Method of fabricating a lateral double-diffused MOSFET (LDMOS) transistor and a conventional CMOS transistor

Granted: February 23, 2010
Patent Number: 7666731
A method of fabricating an LDMOS transistor and a conventional CMOS transistor together on a substrate. A P-body is implanted into a source region of the LDMOS transistor. A gate oxide for the conventional CMOS transistor is formed after implanting the P-body into the source region of the LDMOS transistor. A fixed thermal cycle associated with forming the gate oxide of the conventional CMOS transistor is not substantially affected by the implanting of the P-body into the source region of…

Diffused drain transistor

Granted: November 10, 2009
Patent Number: 7615822
A transistor has a source that includes a first impurity region with a first volume and a first surface area on a surface of the transistor. The transistor also has a drain that includes a second impurity region with a second volume and a second surface area on a surface of the transistor, a third impurity region with a third volume that overlaps and extends deeper than the second volume of the second impurity region, and a fourth impurity region with a fourth volume and a third surface…

Voltage regulator with common s-phase signals and phase lock loops

Granted: November 10, 2009
Patent Number: 7616463
A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes a master controller and one or more slaves, and each slave includes a switching circuit which serves as a power switch for alternately coupling and decoupling the input terminal to an intermediate…

Method and apparatus for multi-phase DC-DC converters using coupled inductors in discontinuous conduction mode

Granted: June 16, 2009
Patent Number: 7548046
A multi-phase, coupled-inductor, DC-DC voltage converter operates in discontinuous conduction mode (DCM) when the system is operated at low output power demand. An embodiment of the converter switches to operating in continuous conduction mode (CCM) when the system is operated at high output power demand. Operation in single-drive and rotating phase DCM operation at low power are described. An alternative embodiment operates in a multiple-drive, rotating-phase, discontinuous conduction…

Method for making magnetic components with N-phase coupling, and related inductor structures

Granted: April 28, 2009
Patent Number: 7525408
Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single…

Master-slave with adaptation control including slave current checking

Granted: April 21, 2009
Patent Number: 7522436
A voltage regulator coupled to an unregulated DC input voltage source by an input terminal, and to a load by an output terminal is disclosed. The voltage regulator converts an input voltage at the input terminal to an output voltage at the output terminal. The voltage regulator includes one or more slaves, and each slave includes a switching circuit. During each switching period of the switching circuit, the current for the slave is checked; namely, after the beginning of a low-side…

Method for making magnetic components with N-phase coupling, and related inductor structures

Granted: March 3, 2009
Patent Number: 7498920
Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single…

Method of fabricating a switching regulator with a high-side p-type device

Granted: December 16, 2008
Patent Number: 7465621
A first impurity region of a first type is implanted to have a first surface area on a substrate. A second impurity region of an opposite second type is implanted into a drain region of the transistor to have a second surface area in the first surface area of the first impurity region. A gate oxide is formed after implantation of the second impurity region between a source region and the drain region of the transistor, and the gate oxide is covered with a conductive material. A third…

Apparatus for isolated switching power supply with coupled output inductors

Granted: December 9, 2008
Patent Number: 7463498
A multiphase DC-to-DC power converter has two or more sets of input switches, each set of input switches driving primary windings of an associated transformer. Each transformer has one or two secondary windings, the secondary windings feeding power through output switches or rectifiers through an associated output inductor into a common filter. At least two of the output inductors are magnetically coupled.

Method of fabricating a lateral double-diffused MOSFET (LDMOS) transistor

Granted: July 29, 2008
Patent Number: 7405117
A method of monolithically fabricating a lateral double-diffused MOSFET (LDMOS) transistor having a source, drain, and a gate on a substrate, with a process flow that is compatible with a CMOS process flow, is disclosed.

Dual gate lateral double-diffused MOSFET (LDMOS) transistor

Granted: July 29, 2008
Patent Number: 7405443
Method and apparatus for providing a lateral double-diffused MOSFET (LDMOS) transistor having a dual gate. The dual gate includes a first gate and a second gate. The first gate includes a first oxide layer formed over a substrate, and the second gate includes a second oxide layer formed over the substrate. The first gate is located a pre-determined distance from the second gate. A digitally implemented voltage regulator is also provided that includes a switching circuit having a dual…

Method for making magnetic components with N-phase coupling, and related inductor structures

Granted: April 1, 2008
Patent Number: 7352269
Methods and structures for constructing a magnetic core of a coupled inductor. The method provides for constructing N-phase coupled inductors as both single and scalable magnetic structures, where N is an integer greater than 1. The method additionally describes how such a construction of the magnetic core may enhance the benefits of using the scalable N-phase coupled inductor. The first and second magnetic cores may be formed into shapes that, when coupled together, may form a single…

Method and apparatus for multi-phase DC-DC converters using coupled inductors in discontinuous conduction mode

Granted: January 8, 2008
Patent Number: 7317305
A multi-phase, coupled-inductor, DC-DC voltage converter operates in discontinuous conduction mode (DCM) when the system is operated at low output power demand. An embodiment of the converter switches to operating in continuous conduction mode (CCM) when the system is operated at high output power demand. Operation in single-drive and rotating phase DCM operation at low power are described. An alternative embodiment operates in a multiple-drive, rotating-phase, discontinuous conduction…

Apparatus for isolated switching power supply with coupled output inductors

Granted: July 3, 2007
Patent Number: 7239530
A multiphase DC-to-DC power converter has two or more sets of input switches, each set of input switches driving primary windings of an associated transformer. Each transformer has one or two secondary windings, the secondary windings feeding power through output switches or rectifiers through an associated output inductor into a common filter. At least two of the output inductors are magnetically coupled.

Power switch using a field-effect transistor (FET) pair

Granted: June 12, 2007
Patent Number: 7230470
A power switch, and a method, for use with a power switch having a field-effect transistor (FET) including source, drain and gate terminals. The power switch includes a first field-effect transistor (FET) having a first drain coupled to the drain terminal, a first source coupled to the source terminal, and a first gate; and, a second FET having a second drain coupled to the drain terminal, a second source coupled to the source terminal, and a second gate. The second FET has a gate length…

Method of fabricating a lateral double-diffused MOSFET

Granted: May 22, 2007
Patent Number: 7220633
A method of monolithically fabricating an LDMOS transistor with a fabrication process that is compatible with a sub-micron CMOS fabrication process. The specification further describes an LDMOS transistor. The LDMOS transistor is implemented in a first impurity region on a substrate. The LDMOS transistor has a source that includes a second impurity region. The second impurity region is implanted into the surface of the substrate within the first impurity region. Additionally, the LDMOS…

Switching regulator with average current mode control

Granted: January 30, 2007
Patent Number: 7170267
A system and method control an output voltage across a load using current mode control to control current through an output filter connected to the load. The output voltage across the load is compared with a reference voltage to generate a reference current signal indicative of a desired average current through the load. A control signal is generated to indicate when an output current is greater than the desired output current. The output filter is alternately coupled to a first supply…