Integrated Silicon Solution Profile

Integrated Silicon Solution Patent Grants

Low power high speed program method for multi-time programmable memory device

Patent Number 9543016 - January 10, 2017

A programming method for a PMOS multi-time programmable (MTP) flash memory device biases the select gate transistor to a constant drain…

DRAM error correction event notification

Patent Number 9529667 - December 27, 2016

A method in a memory device implementing error correction includes setting an error correction event register to a first value; accessing a…

Auto low current programming method without verify

Patent Number 9514806 - December 6, 2016

A flash memory device employs a low current auto-verification programming scheme using multi-step programming voltage and cell current…

Resistive memory device implementing selective memory cell refresh

Patent Number 9496030 - November 15, 2016

A resistive memory device implements a selective refresh operation in which only memory cells with reduced sense margin are refreshed. In some…

High speed sequential read method for flash memory

Patent Number 9496046 - November 15, 2016

A flash memory device implements a sequential read method using overlapping read cycles to initiate the bit-line precharge and equalization…

Integrated Silicon Solution Patent Applications

METHOD FOR IMPROVING SENSING MARGIN OF RESISTIVE MEMORY

Application Number 20150348624 - December 3, 2015

A method in a resistive memory device includes configuring two or more memory cells in a column of the array sharing the same bit line and the…

DRAM ERROR CORRECTION EVENT NOTIFICATION

Application Number 20150331745 - November 19, 2015

A method in a memory device implementing error correction includes setting an error correction event register to a first value; assessing a…

FLASH MEMORY DEVICE WITH SENSE-AMPLIFIER-BYPASSED TRIM DATA READ

Application Number 20150279473 - October 1, 2015

A non-volatile memory device includes a two-dimensional array of non-volatile memory cells where a first portion of memory cells being…

REFERENCE CURRENT CIRCUIT WITH TEMPERATURE COEFFICIENT CORRECTION

Application Number 20150270006 - September 24, 2015

A flash memory device uses a pair of parallely connected NMOS transistors with different voltage ratings to generate the reference current for…

ABRIDGED ERASE VERIFY METHOD FOR FLASH MEMORY

Application Number 20150221388 - August 6, 2015

A non-volatile memory device includes a control circuit configured to perform a block erase operation including a block erase cycle and an…

Integrated Silicon Solution Federal District Court Decisions

Goodman v. Intel Corporation et al

California Northern District Court - April 19, 2012

STIPULATED PROTECTIVE ORDER. Signed by Judge Maxine M. Chesney on April 19, 2012. (mmclc2, COURT STAFF) (Filed on 4/19/2012)

Goodman v. Intel Corporation et al

California Northern District Court - March 26, 2012

ORDER EXTENDING TIME FOR EXCHANGE OF PRELIMINARY CLAIM CONSTRUCTIONS AND EXTRINSIC EVIDENCE PURSUANT TO PATEN L.R. 4-2. Signed by Judge…

Goodman v. Intel Corporation et al

California Northern District Court - March 12, 2012

ORDER RE DISMISSAL OF CLAIMS AGAINST INTEL CORPORATION WITH PREJUDICE. Signed by Judge Maxine M. Chesney on March 12, 2012. (mmclc2, COURT…

Goodman v. Intel Corporation et al

California Northern District Court - March 6, 2012

ORDER EXTENDING TIME FOR DEFENDANT ISSI TO SERVE P.R. 3-3 INVALIDITY CONTETIONS. Signed by Judge Maxine M. Chesney on March 6, 2012. (mmclc2,…

Goodman v. Intel Corporation et al

California Northern District Court - February 1, 2012

ORDER FOR STIPULATED CONDITIONAL DISMISSAL AS TO INTEL CORPORATION. Signed by Judge Maxine M. Chesney on February 1, 2012. (mmclc2, COURT…