Lam Research Patent Grants

Apparatus and method for dynamic control of plated uniformity with the use of remote electric current

Granted: February 14, 2017
Patent Number: 9567685
An apparatus for electroplating metal on a substrate while controlling plating uniformity includes in one aspect: a plating chamber having anolyte and catholyte compartments separated by a membrane; a primary anode positioned in the anolyte compartment; an ionically resistive ionically permeable element positioned between the membrane and a substrate in the catholyte compartment; and a secondary electrode configured to donate and/or divert plating current to and/or from the substrate,…

Method and apparatus to minimize seam effect during TEOS oxide film deposition

Granted: February 14, 2017
Patent Number: 9570289
A method of minimizing a seam effect of a deposited TEOS oxide film during a trench filling process performed on a semiconductor substrate in a semiconductor substrate plasma processing apparatus comprises supporting a semiconductor substrate on a pedestal in a vacuum chamber thereof. Process gas including TEOS, an oxidant, and argon is flowed through a face plate of a showerhead assembly into a processing region of the vacuum chamber. RF energy energizes the process gas into a plasma…

Plasma assisted atomic layer deposition titanium oxide for conformal encapsulation and gapfill applications

Granted: February 14, 2017
Patent Number: 9570290
The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with…

Method to etch copper barrier film

Granted: February 14, 2017
Patent Number: 9570320
A method of opening a barrier film below copper structures in a stack is provided. A pulsed gas is provided into a plasma processing chamber, wherein the providing the pulsed gas comprises providing a pulsed H2 containing gas and providing a pulsed halogen containing gas, wherein the pulsed H2 containing gas and the pulsed halogen containing gas are pulsed out of phase, and wherein the pulsed H2 containing gas has an H2 high flow period and the pulsed halogen containing gas has a halogen…

Hybrid feature etching and bevel etching systems

Granted: February 7, 2017
Patent Number: 9564285
A plasma processing system having at least a plasma processing chamber for performing plasma processing of a substrate and utilizing at least a first processing state and a second processing state. Plasma is present above the center region of the substrate during the first processing stale to perform plasma processing of at least the center region during the first processing state. Plasma is absent above the center region of the substrate but present adjacent to the bevel edge region…

Methods for processing bevel edge etching

Granted: February 7, 2017
Patent Number: 9564308
The embodiments provide apparatus and methods for removal of etch byproducts, dielectric films and metal films near the substrate bevel edge, and chamber interior to avoid the accumulation of polymer byproduct and deposited films and to improve process yield. In an exemplary embodiment, a plasma processing chamber configured to clean a bevel edge of a substrate is provided. The plasma processing chamber includes a substrate support configured to receive the substrate. The plasma…

Selective inhibition in atomic layer deposition of silicon-containing films

Granted: February 7, 2017
Patent Number: 9564312
Methods of selectively inhibiting deposition of silicon-containing films deposited by atomic layer deposition are provided. Selective inhibition involves exposure of an adsorbed layer of a silicon-containing precursor to a hydrogen-containing inhibitor, and in some instances, prior to exposure of the adsorbed layer to a second reactant. Exposure to a hydrogen-containing inhibitor may be performed with a plasma, and methods are suitable for selective inhibition in thermal or plasma…

Contact clean in high-aspect ratio structures

Granted: January 31, 2017
Patent Number: 9558928
Method and apparatus for cleaning a substrate having a plurality of high-aspect ratio openings are disclosed. A substrate can be provided in a plasma processing chamber, where the substrate includes the plurality of high-aspect ratio openings, the plurality of high-aspect ratio openings are defined by vertical structures having alternating layers of oxide and nitride or alternating layers of oxide and polysilicon. The substrate can include a silicon oxide layer over a damaged or…

Electroless plating solution with at least two borane containing reducing agents

Granted: January 24, 2017
Patent Number: 9551074
A solution for providing electroless deposition of a metal layer on a substrate is provided. A solvent is provided. A metal precursor is provided to the solvent. A first borane containing reducing agent is provided to the solvent. A second borane containing reducing agent is provided to the solvent, wherein the first borane containing reducing agent has a deposition rate of at least five times a deposition rate of the second borane containing reducing agent, and wherein the solution is…

Method for integrating germanides in high performance integrated circuits

Granted: January 24, 2017
Patent Number: 9553031
A method for making an integrated circuit includes a) providing a substrate including n-type metal oxide semiconductor field effect transistors (NMOSFETs) and p-type metal oxide semiconductor field effect transistors (PMOSFETs), wherein channel regions of the NMOSFETs and the PMOSFETs include germanium; b) depositing and patterning a mask layer to mask the channel regions of the PMOSFETs and to not mask the channel regions of the NMOSFETs; c) passivating an exposed surface of the…

Dense oxide coated component of a plasma processing chamber and method of manufacture thereof

Granted: January 17, 2017
Patent Number: 9546432
A method of forming a dense oxide coating on an aluminum component of semiconductor processing equipment comprises cold spraying a layer of pure aluminum on a surface of the aluminum component to a predetermined thickness. A dense oxide coating is then formed on the layer of pure aluminum using a plasma electrolytic oxidation process, wherein the plasma electrolytic oxidation process causes the layer of pure aluminum to undergo microplasmic discharges, thus forming the dense oxide…

Methods and apparatus for dual confinement and ultra-high pressure in an adjustable gap plasma chamber

Granted: January 17, 2017
Patent Number: 9548186
A plasma processing system having a plasma processing chamber configured for processing a substrate is provided. The plasma processing system includes at least an upper electrode and a lower electrode for processing the substrate. The substrate is disposed on the lower electrode during plasma processing, where the upper electrode and the substrate forms a first gap. The plasma processing system also includes an upper electrode peripheral extension (UE-PE). The UE-PE is mechanically…

Method of conditioning vacuum chamber of semiconductor substrate processing apparatus

Granted: January 17, 2017
Patent Number: 9548188
A method of conditioning a vacuum chamber of a semiconductor substrate processing apparatus includes forming a layer of an organic polymeric film on plasma or process gas exposed surfaces thereof. The method includes: (a) flowing a first reactant in vapor phase of a diacyl chloride into the vacuum chamber; (b) purging the vacuum chamber after a flow of the first reactant has ceased; (c) flowing a second reactant in vapor phase into the vacuum chamber selected from the group consisting of…

Plasma etching systems and methods using empirical mode decomposition

Granted: January 17, 2017
Patent Number: 9548189
A substrate etching system includes an etching control module, a filtering module, and an endpoint module. The etching control module selectively begins plasma etching of a substrate within an etching chamber. The filtering module, during the plasma etching of the substrate: receives a signal including endpoint information; decomposes the signal using empirical mode decomposition (EMD); and generates a filtered signal based on results of the EMD. The endpoint module indicates when an…

Method and apparatus for processing wafer-shaped articles

Granted: January 17, 2017
Patent Number: 9548221
The wet treatment of wafer-shaped articles is improved by utilizing a droplet generator designed to produce a spray of monodisperse droplets. The droplet generator is mounted above a spin chuck, and is moved across a major surface of the wafer-shaped article in a linear or arcuate path. The droplet generator includes a transducer acoustically coupled to its body such that sonic energy reaches a region of the body surrounding the discharge orifices. Each orifice has a width w of at least…

Apparatus for treating surfaces of wafer-shaped articles

Granted: January 17, 2017
Patent Number: 9548223
A device and method for processing wafer-shaped articles comprises a process chamber and a rotary chuck located within the process chamber. The rotary chuck is adapted to be driven without physical contact through a magnetic bearing. The rotary chuck comprises a series of gripping pins adapted to hold a wafer shaped article in a position depending downwardly from the rotary chuck. The rotary chuck further comprises a plate that rotates together with the rotary chuck. The plate is…

Void free tungsten fill in different sized features

Granted: January 17, 2017
Patent Number: 9548228
Methods of depositing tungsten in different sized features on a substrate are provided herein. The methods involve depositing a first bulk layer of tungsten in the features, etching the deposited tungsten, depositing a second bulk tungsten, which is interrupted to treat the tungsten after the smaller features are completely filled, and resuming deposition of the second bulk layer after treatment to deposit smaller, smoother tungsten grains into the large features. The methods also…

Mask shrink layer for high aspect ratio dielectric etch

Granted: January 10, 2017
Patent Number: 9543148
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in a dielectric-containing stack on a semiconductor substrate. In many embodiments, a mask shrink layer is deposited on a patterned mask layer to thereby narrow the openings in the mask layer. The mask shrink layer may be deposited through a vapor deposition process including, but not limited to, atomic layer deposition or chemical vapor deposition. The mask shrink layer can result in…

Systems and methods for forming ultra-shallow junctions

Granted: January 10, 2017
Patent Number: 9543150
A method for forming a junction on a substrate includes removing a native oxide layer of a bulk material; doping an outer layer of the bulk material with molecular hydrogen to create a hydrogen-doped outer layer; and nano-doping the hydrogen-doped outer layer using one of boron or phosphorous to a target junction depth to create a nano-doped layer.

Technique to deposit sidewall passivation for high aspect ratio cylinder etch

Granted: January 10, 2017
Patent Number: 9543158
Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that…