Ultratech Patent Applications


Granted: July 6, 2017
Application Number: 20170194204
Through via holes are prepared for metallization using ALD and PEALD processing. Each via is coated with a titanium nitride barrier layer having a thickness ranging from 20 to 200 ?. A ruthenium sealing layer is formed over the titanium nitride barrier layer wherein the sealing layer is formed without oxygen to prevent oxidation of the titanium nitride barrier layer. A ruthenium nucleation layer is formed over the sealing layer wherein the nucleation layer is formed with oxygen in order…

Full-wafer inspection methods having selectable pixel density

Granted: June 22, 2017
Application Number: 20170178980
Full-wafer inspection methods for a semiconductor wafer are disclosed. One method includes making a measurement of a select measurement parameter simultaneously over measurement sites of the entire surface of the semiconductor wafer at a maximum measurement-site pixel density ?max to obtain measurement data, wherein the total number of measurement-site pixels obtained at the maximum measurement-site pixel density ?max is between 104 and 108. The method also includes defining a plurality…

High-efficiency line-forming optical systems and methods for defect annealing and dopant activation

Granted: June 8, 2017
Application Number: 20170162392
High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line…

Systems and methods of characterizing process-induced wafer shape for process control using CGS interferometry

Granted: June 8, 2017
Application Number: 20170162456
Systems and methods of characterizing wafer shape using coherent gradient sensing (CGS) interferometry are disclosed. The method includes measuring at least 3×106 data points on a wafer surface using a CGS system to obtain a topography map of the wafer surface. The data are collected on a wafer for pre-processing and post-processing of the wafer, and the difference calculated to obtain a measurement of the effect of the process on wafer surface shape. The process steps for processing…


Granted: May 25, 2017
Application Number: 20170145564
An improved ALD system usable for low vapor pressure liquid and sold precursors. The ALD system includes a precursor container and inert gas delivery elements configured to increase precursor vapor pressure within a precursor container by injecting an inert gas pulse into the precursor container while a precursor pulse is being removed to the reaction chamber. A controllable inert gas flow valve and a flow restrictor are disposed along an inert gas input line leading into the precursor…

Methods of forming an ALD-inhibiting layer using a self-assembled monolayer

Granted: April 27, 2017
Application Number: 20170114451
Methods of forming an ALD-inhibiting layer using a layer of SAM molecules include providing a metalized substrate having a metal M and an oxide layer of the metal M. A reduction gas that includes a metal Q is used to reduce the oxide layer of the metal M, leaving a layer of form of M+MQyOx atop the metal M. The SAM molecules are provided as a vapor and form an ALD-inhibiting SAM layer on the M+MQyOx layer. Methods of performing S-ALD using the ALD-inhibiting SAM layer are also disclosed.

High-throughput multichamber atomic layer deposition systems and methods

Granted: March 30, 2017
Application Number: 20170088952
ALD systems and methods having high throughput are disclosed. The ALD systems and methods employ a process chamber that has multiple chamber sections defined by interior chamber dividers. The wafers to be processed are supported on a platen that rotates beneath a process chamber housing with a small gap therebetween so that the wafers are moved between the chamber sections. The multiple chamber sections are pneumatically partitioned by the dividers and by pneumatic valves operably…

Laser-assisted atomic layer deposition of 2D metal chalcogenide films

Granted: March 16, 2017
Application Number: 20170073812
Methods of forming 2D metal chalcogenide films using laser-assisted atomic layer deposition are disclosed. A direct-growth method includes: adhering a layer of metal-bearing molecules to the surface of a heated substrate; then reacting the layer of metal-bearing molecules with a chalcogenide-bearing radicalized precursor gas delivered using a plasma to form an amorphous 2D film of the metal chalcogenide; then laser annealing the amorphous 2D film to form a crystalline 2D film of the…

Plasma-enhanced atomic layer deposition system with rotary reactor tube

Granted: March 2, 2017
Application Number: 20170062191
Systems and methods for coating particles using PE-ALD and a rotary reactor tube are disclosed. The reactor tube is part of a reactor tube assembly that can rotate and move axially so that it is operably disposed relative to a plasma-generating device. The plasma-generating device has an active state that generates a plasma from a precursor gas and an inactive state that passes the precursor gas without forming a plasma. The reactor tube resides in a chamber that has an open position for…

Masking methods for ALD processes for electrode-based devices

Granted: January 26, 2017
Application Number: 20170025272
Masking methods for atomic-layer-deposition processes for electrode-based devices are disclosed, wherein solder is used as a masking material. The methods include exposing electrical contact members of an electrical device having an active device region and a barrier layer formed by atomic layer deposition. This includes depositing solder elements on the electrical contact members, then forming the barrier layer using atomic layer deposition, wherein the barrier layer covers the active…

High-efficiency line-forming optical systems and methods using a serrated spatial filter

Granted: January 26, 2017
Application Number: 20170025287
High-efficiency line-forming optical systems and methods that employ a serrated aperture are disclosed. The line-forming optical system includes a laser source, a beam conditioning optical system, a first aperture device, and a relay optical system that includes a second aperture device having the serrated aperture. The serrated aperture is defined by opposing serrated blades configured to reduce intensity variations in a line image formed at an image plane as compared to using an…

Polarization-based coherent gradient sensing systems and methods

Granted: December 15, 2016
Application Number: 20160363440
Polarization-based coherent gradient-sensing systems and methods for measuring at least one surface-shape property of a specularly reflective surface are disclosed. The method includes: reflecting a first circularly polarized laser beam from a sample surface to form a second circularly polarized laser beam that contains surface-shape information; converting the second circularly polarized laser beam to a linearly polarized reflected laser beam; directing respective first and second…

Microchamber laser processing systems and methods using localized process-gas atmosphere

Granted: December 8, 2016
Application Number: 20160354865
Microchamber laser processing systems and methods that use a localized process-gas atmosphere are disclosed. The method includes processing a substrate with a surface by providing a process gas to a central region of the microchamber that includes the surface of the substrate and providing a curtain gas to a peripheral region of the chamber that includes the surface of the substrate. The method also includes providing a vacuum to a region of the chamber between its central and peripheral…


Granted: December 1, 2016
Application Number: 20160351682
Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can…

Method of laser annealing a semiconductor wafer with localized control of ambient oxygen

Granted: November 24, 2016
Application Number: 20160343583
Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas…

High-efficiency line-forming optical systems and methods

Granted: October 20, 2016
Application Number: 20160306177
A line-forming optical system and method are disclosed that form a line image with high-efficiency. A method includes forming a laser beam having a first intensity profile with a Gaussian distribution in at least a first direction and passing at least 50% of the laser beam in the first direction to form a first transmitted light. The method also includes: focusing the first transmitted light at an intermediate image plane to define a second intensity profile having a central peak and…


Granted: September 29, 2016
Application Number: 20160281223
An improved Plasma Enhanced Atomic Layer Deposition (PEALD) system and related operating methods are disclosed. A vacuum reaction chamber includes a vacuum system that separates a first outflow from the reaction chamber, comprising unreacted first precursor, from a second outflow from the reaction chamber, comprising second precursor and any reaction by products from the reaction of the second precursor with the coating surfaces. A trap, including trap material surfaces, is provided to…

Systems and methods for reducing pulsed laser beam profile non-uniformities for laser annealing

Granted: September 22, 2016
Application Number: 20160276184
Systems and methods for reducing pulsed laser beam profile non-uniformities for laser annealing are disclosed. The methods include directing an initial pulsed laser beam along an optical axis, and imparting to each light pulse a time-varying angular deflection relative to the optical axis. This forms a new laser beam wherein each light pulse is smeared out over an amount of spatial deflection ? sufficient to reduce the micro-scale intensity variations in the laser beam. The new laser…

Laser annealing systems and methods with ultra-short dwell times

Granted: August 18, 2016
Application Number: 20160240407
Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing…


Granted: August 18, 2016
Application Number: 20160240440
Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with each other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat…