MULTI-THRESHOLD VOLTAGE INTEGRATION SCHEME FOR COMPLEMENTARY FIELD EFFECT TRANSISTORS
Granted: November 21, 2024
Application Number:
20240387286
Methods of manufacturing electronic devices are described. Embodiments of the present disclosure advantageously provide methods of manufacturing electronic devices, e.g., complementary field-effect transistors (CFETs) that meet reduced thickness, reduced leakage, lower thermal budget, and Vt requirements (including multi-Vt), and have improved device performance and reliability. Some embodiments of the methods include conventional dipole engineering techniques such as dipole first…
FORMATION OF SILICON-AND-METAL-CONTAINING MATERIALS FOR HARDMASK APPLICATIONS
Granted: November 21, 2024
Application Number:
20240387190
Exemplary methods of semiconductor processing may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-containing precursor and a metal-containing precursor. The silicon-containing precursor and the metal-containing precursor may be fluidly isolated prior to reaching the processing region. A substrate may be housed within the processing region. The methods may include generating plasma…
FORMATION OF SILICON-AND-METAL-CONTAINING MATERIALS FOR HARDMASK APPLICATIONS
Granted: November 21, 2024
Application Number:
20240387174
Exemplary methods of semiconductor processing may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-and-halogen-containing precursor and a metal-containing precursor. A substrate may be housed within the processing region. The methods may include generating plasma effluents of the deposition precursors. The methods may include forming a layer of silicon-and-metal-containing material on the…
METHODS FOR FORMING LOW-K DIELECTRIC MATERIALS WITH INCREASED ETCH SELECTIVITY
Granted: November 21, 2024
Application Number:
20240387167
Exemplary semiconductor processing methods may include providing deposition precursors to a processing region of a semiconductor processing chamber. The deposition precursors may include a silicon-carbon-and-hydrogen-containing precursor. A substrate may be disposed within the processing region. The methods may include forming plasma effluents of the deposition precursors, wherein the plasma effluents are formed at a plasma power of less than or about 2,000 W. The methods may include…
INDUCTIVELY COUPLED PLASMA APPARATUS WITH NOVEL FARADAY SHIELD
Granted: November 21, 2024
Application Number:
20240387151
An antenna assembly. The antenna assembly may include an antenna, having a loop structure, and a dielectric window, adjacent to the antenna. The antenna assembly may also include a Faraday shield assembly disposed between the antenna and the dielectric window, where the Faraday shield assembly is disposed at least partially around the antenna. The Faraday shield assembly may include a plurality of metallic sections, electrically isolated from one another, where the plurality of metallic…
ONE SIDE ANODIZATION OF DIFFUSER
Granted: November 21, 2024
Application Number:
20240387145
Exemplary diffusers for a substrate processing chamber may include a diffuser body that is characterized by a first surface on an inlet side of the diffuser body and a second surface on an outlet side of the diffuser body. The diffuser body may define a plurality of apertures through a thickness of the diffuser body. The first surface may not be anodized. The second surface may be anodized.
MULTIPLE ELECTRON BEAM OPTICS
Granted: November 21, 2024
Application Number:
20240387140
Multiple electron beam optics that includes a detection unit that comprises an array of sensors, and a cross talk reduction unit. For each sensor of multiple sensors of the array of sensors: (i) the sensor includes an aperture and a sensing region that is configured to sense relevant backscattered electrons, the relevant backscattered electrons are emitted from the sample as a result of an illumination of the sample with a primary electron beam that is associated with the sensor and…
ELECTRON BEAM SPOT SHAPE RECONSTRUCTION UNIT
Granted: November 21, 2024
Application Number:
20240386589
An electron beam spot shape reconstruction unit that includes a processing circuit and a memory unit. The processing circuit is configured to reconstruct a shape of an electron beam spot by (i) obtaining multiple groups of images of circular targets of a sample, wherein different groups of images of the multiple groups of images are associated with different polar angles; (ii) processing at least two of the multiple groups of images to determine first-axis edge width information and…
POSITIONING SYSTEM
Granted: November 21, 2024
Application Number:
20240385203
A positioning system that includes (a) a linear motor that includes a movable magnetic unit and a coil stator, the coil stator includes a group of coil stator segments; wherein the mechanical support unit is mechanically coupled to the movable magnetic unit; (b) a mechanical support element for supporting a sample within a vacuum chamber; (c) a power supply that is configured to independently supply power to different coil stator segments of the coil stator segments to induce a movement…
ISOLATION MODULE FORMATION FOR BACKSIDE POWER DELIVERY APPLICATION
Granted: November 14, 2024
Application Number:
20240379438
Semiconductor devices and methods of manufacturing the same are described. The method includes combining selective recess of a sacrificial layer and isotropic etching of a silicon layer in order to form a protective cap that will allow the silicon layer of the substrate to be etched without affecting the sacrificial layer.
IMPLANT INTO EUV METAL OXIDE PHOTORESIST MODULE TO REDUCE EUV DOSE
Granted: November 14, 2024
Application Number:
20240379376
Disclosed herein are approaches for reducing EUV dose during formation of a patterned metal oxide photoresist. In one approach, a method may include providing a stack of layers atop a substrate, the stack of layers comprising a film layer, and implanting the film layer with ions. The method may further include depositing a metal oxide photoresist atop the film layer, and patterning the metal oxide photoresist.
MITIGATION OF FIRST WAFER EFFECT
Granted: November 14, 2024
Application Number:
20240379343
Embodiments of the disclosure relate to methods for reducing or eliminating the first wafer effect after chamber cleans for plasma etch processes. In some embodiments, the wafer support is maintained at an elevated temperature relative to the etch process. In some embodiments, the etch process is a NF3+NH3 plasma etch to remove native oxides from a silicon substrate.
ENTROPY BASED IMAGE PROCESSING FOR FOCUSED ION BEAM DELAYER – EDGE SLICES DETECTION
Granted: November 14, 2024
Application Number:
20240379327
A method of delayering a sample that includes a second layer formed under a first layer, where the first and second layers are different materials or different texture, the method including: acquiring a plurality of gray scale images of the region of interest in an iterative process by alternating a sequence of delayering the region of interest with a first charged particle beam and imaging a surface of the region of interest with a second charged particle beam; after each iteration of…
METHOD FOR ILLUMINATING A SUBSTRATE USING A SINGLE ACOUSTO OPTICAL DEVICE
Granted: November 14, 2024
Application Number:
20240377702
A method and a system for illuminating a substrate, the system may include an acousto-optic device (AOD); and an etendue expanding optical module. The AOD may include a surface having an illuminated region; wherein the illuminated region is configured to receive a collimated input beam while being fed with a control signal that causes the illuminated region to output illuminated region output beams that are collimated and exhibit deflection angles that scan, during a scan period, a…
MICROSTRUCTURE CONTROL OF CONDUCTING MATERIALS THROUGH SURFACE COATING OF POWDERS
Granted: November 14, 2024
Application Number:
20240376595
Exemplary deposition methods may include introducing hydrogen into a processing chamber, a powder disposed within a processing region of the processing chamber. The method may include striking a first plasma in the processing region, the first plasma including energetic hydrogen species. The method may include exposing the powder to the energetic hydrogen species in the processing region. The method may include chemically reducing the powder through a reaction of the powder with the…
PROCESSING CHAMBER WITH GAS RECYCLING
Granted: November 7, 2024
Application Number:
20240368764
Semiconductor manufacturing processing chambers with recycling capability and methods of recycling a chemical precursor are described. The processing chamber comprises a chamber body with a substrate support. The substrate support is spaced form the chamber lid to create a process region. A gas inlet provides a flow of gas to the process region and a recirculation plenum is in fluid communication with the process region. At least one fast-acting valve is connected to the recirculation…
3D DRAM Access Transistor
Granted: November 7, 2024
Application Number:
20240373622
Disclosed herein are approaches for forming a 3-D dynamic random-access memory device having reduced floating body effect. In one example, a method may include forming a plurality of layers stacked in a first direction, the plurality of layers including a gate layer formed over a first oxide layer, and a source/drain (S/D) layer between a set of gate oxide layers. The set of gate oxide layers may be formed over the gate layer, and the S/D layer may include a source and a drain on…
ELECTROSTATIC CLAMP HAVING CHARGE CONTROL ASSEMBLY
Granted: November 7, 2024
Application Number:
20240371675
An electrostatic clamp system may include a conductive base; a ceramic body, having an inner side that is attached to the conductive base, and an outer side to face a substrate, the ceramic body including an electrode assembly; and a charge control assembly, the charge control assembly defining an electrically conductive structure that is isolated from the electrode assembly and extends through the conductive base to an upper surface of the outer side of the ceramic body.
LIFT ASSEMBLY FOR SEMICONDUCTOR MANUFACTURING PROCESSING CHAMBER
Granted: November 7, 2024
Application Number:
20240371673
Apparatuses and methods for loading and unloading substrates from a semiconductor manufacturing processing chamber are described. Some embodiments advantageously provide improved lift assemblies (e.g., lift ring designs) for centering lift pins in semiconductor processing chambers by allowing for unconstrained translation of the lift pins in the x-y plane. Some embodiments advantageously prevent lift pin tilting. Some embodiments advantageously provide a seal between the top end portion…
HIGH-THROUGHPUT PLASMA LID FOR SEMICONDUCTOR MANUFACTURING PROCESSING CHAMBERS
Granted: November 7, 2024
Application Number:
20240371613
Semiconductor manufacturing processing chambers having an RF isolator between the support ring and the showerhead and/or an RF gasket between the showerhead and the gas funnel are described. A cap insert with a cap housing around the cap insert is on the gas funnel and an RF feed is in contact with the showerhead. A substrate support can be included and may have an RF return path directed through the substrate support.
