System and method for multilane link rate negotiation
Granted: November 16, 2010
Patent Number:
7836199
A system and method are provided for negotiating a link data rate in a communication system using a plurality of data rates. In a system including a first device network-connected to a second device, auto-negotiation (AN) messages are mutually transmitted. The AN messages indicate rate information such as preferred data rate capabilities, if the device has a dual-rate capability, single data rate capabilities, or is capable of communicating over a plurality of physical medium lanes. If…
System and method for inverse multiplexing using transcoding and frame alignment markers
Granted: November 16, 2010
Patent Number:
7835401
A system and method are provided for framing messages in a data streams encoded with redundant information for transmission and recovering the messages at a receiver. The transmission method accepts an energy waveform representing N words at a first bit rate, encoded with redundant information, where each word includes P number of bits. The N words are transformed, creating N transcoded words, where each transcoded word includes Q number of bits, and where Q<P. The N transcoded words…
System and method for synchronous payload envelope mapping without pointer adjustments
Granted: November 2, 2010
Patent Number:
7826490
A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with…
High speed multi-modulus prescalar divider
Granted: November 2, 2010
Patent Number:
7826563
A system and method are provided for multi-modulus division. The method accepts an input first signal having a first frequency and divides the first frequency by an integral number. A second signal is generated with a plurality of phase outputs, each having a second frequency. Using a daisy-chain register controller, phase outputs are selected and supplied as a third signal with a frequency. Selecting phase outputs using the daisy-chain register controller includes supplying the third…
Channel-less multithreaded DMA controller
Granted: October 26, 2010
Patent Number:
7822885
A channel-less system and method are provided for multithreaded communications with a direct memory access (DMA) controller. The method accepts a plurality of DMA command messages directed to a fixed port address. The DMA command messages are arranged in a first-in first-out (FIFO) queue, in the order in which they are received. The DMA command messages are supplied to a DMA controller from the FIFO queue, and in response to the DMA command message, data transfer operation are managed by…
MoCA frame bundling and frame bursting
Granted: October 19, 2010
Patent Number:
7817642
A system and method are provided for aggregating Multimedia over Coax Alliance (MoCA) Medium Access Control (MAC) frames. The method sends a Multiframe Reservation Request (MRR) requesting a transmission time slot, and receives a grant in response to the MRR. Subsequent to sending the MRR, a plurality of MoCA MAC frames are accepted and assembled into a physical layer (PHY) burst packet that is transmitted in the granted time slot. A method is also provided for bundling client data…
Digitally clock with selectable frequency and duty cycle
Granted: August 17, 2010
Patent Number:
7778371
A system and method are provided for controlling the duty cycle and frequency of a digitally generated clock. The method accepts a first clock signal having a fixed first frequency. A frequency control word with a first pattern is loaded into a first plurality of serially-connected registers. A duty cycle control word with a second pattern is loaded into a second plurality of serially-connected registers. A register clock signal is generated in response to the first clock and the first…
Solid state thermal electric logic
Granted: August 10, 2010
Patent Number:
7772873
A method is provided for thermal electric binary logic control. The method accepts an input voltage representing an input logic state. A heat reference is controlled in response to the input voltage. The method supplies an output voltage representing an output logic state, responsive to the heat reference. More explicitly, the heat reference controls the output voltage of a temperature-sensitive voltage divider. For example, the temperature-sensitive voltage divider may be a thermistor…
Cache stashing processor control messages
Granted: August 10, 2010
Patent Number:
7774522
A system and method have been provided for pushing cacheable control messages to a processor. The method accepts a first control message, identified as cacheable and addressed to a processor, from a peripheral device. The first control message is allocated into a cache that is associated with the processor, but not associated with the peripheral device. In response to a read-prompt the processor reads the first control message directly from the cache. The read-prompt can be a hardware…
Thermaltronic analog device
Granted: August 3, 2010
Patent Number:
7768338
A method is provided for the electronic processing of analog signals in thermaltronic device. The method accepts an analog input signal, e.g., an AC signal, at a thermaltronic device input and generates a thermal electric (TE) temperature having a first transfer function responsive to the input signal. As opposed to having a digital response, the transfer function is either linear or logarithmic. An analog output signal, e.g., an AC signal, is generated having a second transfer function…
Optical fiber micro array lens
Granted: August 3, 2010
Patent Number:
7768706
An optical fiber micro array lens is provided along with an associated fabrication method. The micro array lens is fabricated from a mesh of optical fibers. The mesh includes a first plurality of cylindrical optical fibers. Each fiber from the first plurality has a flat bottom surface and a hemicylindrical top surface. The top and bottom surfaces are aligned in parallel with a central fiber axis. The mesh also includes a second plurality of cylindrical optical fibers. Each fiber from the…
Universal socketless test fixture
Granted: August 3, 2010
Patent Number:
7768283
A universal socketless integrated circuit (IC) electrical test fixture is provided. The test fixture is made up of a probing platform to accept and heatsink an IC. The IC has electrical contacts formed on a bottom surface in an array of m rows, where each row includes n, or less contacts. A probe arm includes p probe pins, where p is greater than, or equal to n. A clamping mechanism mechanically interfaces the probe arm probe pins to a row of IC contacts under test. An electrical…
Adaptive error slicer and residual intersymbol interference estimator
Granted: July 27, 2010
Patent Number:
7764732
Conventional adaptive equalizers often use the “sign/sign” algorithm as a low complexity means to adjust their tap weight coefficients by driving the correlation between its single-bit “error” and “data” signals to zero. This algorithm fails in the presence of strong residual intersymbol interference (ISI), since this ISI renders the “error” signal sufficiently inaccurate to mask the correlation between “data” and “error”. Failure manifests itself two-fold as an…
System and method for selectively broadcasting a multidimensional digital frame structure
Granted: June 29, 2010
Patent Number:
7746855
A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to selectively synchronize the broadcast frame structure at a plurality of network nodes. The described invention permits the frame synchronization bytes (FSBs) to be made programmable, so that the…
Non-causal channel equalization system
Granted: June 8, 2010
Patent Number:
7734963
A system and method are provided for non-causal channel equalization in a communications system. The method comprises: establishing three thresholds; receiving a binary serial data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; data stream inputs below the first threshold and above the third threshold are a “0” if both the…
Packet preclassification using search tree algorithms
Granted: May 18, 2010
Patent Number:
7720100
An information packet preclassification system and method are provided. The method receives a packet of information and differentiates the packet into segments. Using a decision tree with multiple levels, segments in the packet are compared to a node at a tree level, where each node includes a plurality of node reference segments and corresponding node comparison operators. The reference segment may be a different segment from the packet, or a predetermined segment value stored in…
System and method for automatic clock frequency acquisition
Granted: May 18, 2010
Patent Number:
7720189
A system and method are provided for automatically acquiring a serial data stream clock. The method receives a serial data stream with an unknown clock frequency and coarsely determines the clock frequency. The frequency is coarsely determined by (initially) selecting a high frequency first reference clock (Fref1), and counting the number of data transitions in a first time segment of the serial data stream at a plurality of sample frequencies equal to Fref1/n, where n is an integer?1.…
System and method for speculative global history prediction updating
Granted: April 27, 2010
Patent Number:
7707398
A system and method are provided for updating a speculative global history prediction record in a microprocessor system using pipelined instruction processing. The method accepts microprocessor instructions with consecutive operations, including a conditional branch operation with an associated first branch address. A speculative global history record (SGHR) of conditional branch resolutions and predictions is accessed and hashed with the first branch address, creating a first hash…
System and method for signal level detection
Granted: April 13, 2010
Patent Number:
7698077
An electronic signal level detection system and method are provided. The method receives an analog input signal having a variable voltage and compares the input signal voltage to a threshold. A detection signal is generated for input signal voltages exceeding the threshold in a periodic first time frame. In a second periodic time frame (following the first time frame), a count is updated in response to the generated detection signals. The count is used to create a metric representative…
Wide dynamic range charge pump
Granted: April 6, 2010
Patent Number:
7692458
A wide dynamic range charge pump is provided for use in a phase-locked loop (PLL) circuit. The charge pump includes a first, second, and third set of current sources. The charge pump further includes a first capacitor having an input connected to the first set. A first operational amplifier (op amp) has an input connected to the first set output, and an output connected to the second set output and to a voltage controlled oscillator (VCO) input. A first resistor has a first end connected…
