Method of accelerating the shortest path problem
Granted: February 16, 2010
Patent Number:
7664040
The solution to the shortest path between a source node and multiple destination nodes is accelerated using a grouping of nodes, where the nodes are grouped based on distance from the source node, and a corresponding set of memory locations that indicate when a group includes one or more nodes. The memory locations can be quickly searched to determine the group that represents the shortest distance from the source node and that includes one or more nodes. Nodes may be grouped into…
Thermal electric NOR gate
Granted: February 9, 2010
Patent Number:
7659750
A thermal electric (TE) binary NOR gate logic circuit is provided with a method for NOR logic gating. The method accepts a first input voltage representing an input binary logic state and generates a first thermal electric (TE) temperature in response to the first input voltage. A second input voltage is accepted representing an input binary logic state, and a second TE temperature is generated in response to the second input voltage. In response to the first and second TE temperatures,…
Maximum likelihood channel estimator
Granted: January 19, 2010
Patent Number:
7649965
A system and method are provided for maximum likelihood estimation in a channel receiving data with inter-symbol interference (ISI). The method receives a serial stream of digital information bits. Decisions are made concerning the received information bit values, which the method accepts as processed information, with soft decisions (SDs) and corresponding initial hard decisions (HDs). The method then identifies a sequence of processed information in a correction matrix, and uses the…
Credit based flow control in an asymmetric channel environment
Granted: January 5, 2010
Patent Number:
7643504
A system and method are provided for controlling information flow from a channel service module (CSM) in an asymmetric channel environment. The method provides information for transmission to an OSI model PHY (physical) layer device with a channel buffer. The PHY device channel buffer current capacity is estimated. Information is sent to the channel buffer responsive to estimating the channel buffer capacity, prior to receiving a Polling Result message from the PHY device. Initially,…
Selectable loss of signal (LOS) criteria
Granted: December 15, 2009
Patent Number:
7633878
A system and method are provided for selecting loss of signal (LOS) criteria in a serial communications receiver. The method receives a serial stream of digital data and selects LOS criteria. The serial stream of digital data is compared to the selected LOS criteria. In response to the serial stream of digital data failing to meet the selected LOS criteria, a LOS signal is generated. Some examples of the LOS criteria that might be selected include: a “signal detect” signal received…
Receiver signal strength indicator
Granted: December 8, 2009
Patent Number:
7630695
A system and method are provided for measuring the amplitude of a received signal. The method receives an analog input signal, and compares a peak value of the analog input signal to a threshold level. Threshold transition data is generated, and the threshold level is adjusted in response to the transition data. The above-mentioned processes of comparing, generating, and adjusting are reiterated until the threshold level is about equal to the analog input signal peak value. As a result,…
Thermal electric NAND gate
Granted: October 13, 2009
Patent Number:
7602218
A thermal electric (TE) binary NAND gate logic circuit is provided with a method for NAND logic gating. The method accepts a first input voltage representing an input binary logic state and generates a first thermal electric (TE) temperature in response to the first input voltage. A second input voltage is accepted representing an input binary logic state, and a second TE temperature is generated in response to the second input voltage. In response to the first and second TE…
Polarization control for multichannel and polarization multiplexed optical transport networks
Granted: October 13, 2009
Patent Number:
7603044
A system and method are provided for calibrating orthogonal polarity in a multichannel optical transport network (OTN) receiver. The method accepts a composite signal and separates the polarization of the signal into a pair of 2n-phase shift keying (2n-PSK) modulated input signals via Ix and Qx optical signal paths, where n?1. Likewise, a pair of 2p-PSK modulated input signals are accepted via Iy and Qy optical signal paths where p?1. Polarization-adjusted I?x, Q?x, I?y, and Q?y signals…
Storage system with disk drive power-on-reset detection
Granted: September 15, 2009
Patent Number:
7590875
A disk array controller reliably detects disk drive power-on-reset events that may cause a disk drive that has uncommitted write data stored in its cache to lose such data. The methods for detecting the power-on-reset events include operating the disk drives in an ATA security mode in which a power-on-reset of a disk drive will cause the drive to enter a locked state in which data transfer commands are aborted; and tracking power cycle count attributes of the disk drives over time. When…
Systems and methods for multi-tasking, resource sharing, and execution of computer instructions
Granted: September 15, 2009
Patent Number:
7590785
In a multi-tasking pipelined processor, consecutive instructions are executed by different tasks, eliminating the need to purge an instruction execution pipeline of subsequent instructions when a previous instruction cannot be completed. The tasks do not share registers which store task-specific values, thus eliminating the need to save or load registers when a new task is scheduled for execution. If an instruction accesses an unavailable resource, the instruction becomes suspended,…
Sampled accumulation system and method for jitter attenuation
Granted: September 15, 2009
Patent Number:
7590154
A system and method are provided for a sampled accumulation method that maps information into Synchronous Payload Envelopes (SPEs). The method buffers data from a plurality of tributaries, and sequentially stores buffer-fill information for each tributary in a first memory, at a rate of up to one tributary per system clock (Fsys) cycle. A stored accumulation of buffer-fill information for each tributary is updated at a sample rate frequency (Fsample), where Fsample?Fsys. The stored…
Flexible tributary interface with serial control line
Granted: September 1, 2009
Patent Number:
7583709
A system and method are provided for transporting Plesiochronous Digital Hierarchy (PDH) tributaries. The method accepts a plurality of PDH tributaries; generates a serial data stream of interleaved PDH tributaries; generates a serial control stream of signals for recovering the PDH tributaries; and, generates a clock signal for timing the data and control streams. The serial data stream of interleaved PDH tributaries is loaded into the payload of a data frame structure. Likewise, the…
Optical transceiver with electrical ring distribution interface
Granted: July 14, 2009
Patent Number:
7561801
A ring connection system and method are providing for distributing signals in an optical-to-electrical interface. The method electrically connects a plurality of nodes in a series-connecting ring, and receives an optical signal at a first node from a service provider. The method converts the optical signal to an electrical signal, and distributes the electrical signal via the ring. At each node, the electrical signal is supplied from a customer interface. Typically, each node has a…
Instruction set for programmable queuing
Granted: July 7, 2009
Patent Number:
7558890
A traffic manager includes an execution unit that is responsive to instructions related to queuing of data in memory. The instructions may be provided by a network processor that is programmed to generate such instructions, depending on the data. Examples of such instructions include (1) writing of data units (of fixed size or variable size) without linking to a queue, (2) re-sequencing of the data units relative to one another without moving the data units in memory, and (3) linking the…
Circuit for adaptive sampling edge position control and a method therefor
Granted: May 5, 2009
Patent Number:
7529329
A clock and data recovery circuit (CDR) for receiving high-speed digital data, and having an analog phase offset control capability, is improved by providing an adaptive sampling edge position control. A differential circuit samples the raw data signal at three closely spaced sampling points of the eye, and compares advanced and delayed sampled data with the nominal sampled data. If either the advanced or delayed sampled data differ from the nominal sampled data, i.e. if advanced or…
Multi-level slew and swing control buffer
Granted: April 28, 2009
Patent Number:
7525382
A buffer amplifier and an associated method have been provided for slew rate and swing level control in the buffering of a signal. The method accepts an input signal having a voltage swing, a swing control signal, and a slew rate control signal. The voltage swing for each output in a set of serially-connected buffer stages is selected in response to the swing control signal. The selected voltage swing for a subset of buffer stages is modified in response to the slew rate control signal.…
10 GbE LAN signal mapping to OTU2 signal
Granted: March 31, 2009
Patent Number:
7512150
A high-capacity digital communications system and method of transporting 10 GbE LAN packets between user devices over an OTN network that allows the packets to be transported in a manner that is transparent to the destination device(s) on the network. The digital communications system includes an OTN network, and at least one source device and at least one destination device connected to the network via respective 10 Gbase-R interfaces. The system transports 10 GbE LAN data packets over…
User-specified key creation from attributes independent of encapsulation type
Granted: February 17, 2009
Patent Number:
7492763
An integrated circuit has a hardware decoder that parses a frame to identify a type of encapsulation. The integrated circuit also has a number of hardware parsers, each parser being coupled to the decoder by an enable line. During packet processing, one of the parsers is enabled by the decoder, based on the value which identifies the encapsulation type. The enabled parser retrieves one or more attributes from the frame, depending on the encapsulation. The integrated circuit also has a…
Timer with periodic channel service
Granted: January 6, 2009
Patent Number:
7475237
A system and method are provided for periodically servicing a channel in a timer used for controlling events. The method services a channel in a fixed periodic cycle, and reads a first control word loaded in the channel to determine a timer operation. Then, a first data word in the channel is managed in response to the determined operation. In one aspect, a clock signal is supplied with a fixed period. Then, servicing the channel in a fixed periodic cycle includes: establishing a cycle…
System for five-level non-causal channel equalization
Granted: December 9, 2008
Patent Number:
7463695
A system and method are provided for five-level non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; establishing a five-level threshold; comparing the first bit estimate to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; and, in response to the comparisons, determining the value of the first bit. Establishing…
