System and method for performing driver configuration operations without a system reboot
Granted: December 2, 2008
Patent Number:
7461141
A method and apparatus for performing driver configuration operations without a system reboot is disclosed. In one embodiment, a network server's adapter driver receives a request to change a configuration of a selected instance of a plurality of instances. In response, the adapter driver may then determine if there is data flow through the selected instance. If there is no data flow through the selected instance, the method includes blocking subsequent data flow and subsequent…
Accelerating the shortest path problem
Granted: November 25, 2008
Patent Number:
7457286
The solution to the shortest path between a source node and multiple destination nodes is accelerated using a grouping of nodes, where the nodes are grouped based on distance from the source node, and a corresponding set of memory locations that indicate when a group includes one or more nodes. The memory locations can be quickly searched to determine the group that represents the shortest distance from the source node and that includes one or more nodes. Nodes may be grouped into…
Timeshared jitter attenuator in multi-channel mapping applications
Granted: November 25, 2008
Patent Number:
7457390
A timeshared data tributary mapping system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method buffers data from a plurality of tributaries and stores current buffer-fill information at a rate of about one tributary per Fsys clock cycle. An accumulation of buffer-fill information for the plurality of tributaries is updated with current buffer-fill information every Fsys clock cycle. The accumulation of buffer-fill information for the…
Modulated jitter attenuation filter
Granted: October 21, 2008
Patent Number:
7440533
A system and modulation method are provided for reducing jitter in the mapping of information into Synchronous Payload Envelopes (SPEs), in a data tributary mapping system. The method comprises buffering data from a plurality of tributaries, and generating buffer-fill information responsive to the buffered data being written and read. The buffer-fill information is filtered, producing rate control information. The rate control information is modulated, and the modulated rate control…
Method and apparatus for issuing a command to store an instruction and load resultant data in a microcontroller
Granted: October 14, 2008
Patent Number:
7437535
This disclosure relates to communications among processors, coprocessors and memory. Specifically, a method and apparatus provide a single-cycle instruction (“store-and-load”) that stores a command to a co-processor to atomically process data and that loads resultant processed data.
Architecture for providing block-level storage access over a computer network
Granted: September 23, 2008
Patent Number:
7428581
A network-based storage system comprises one or more block-level storage servers that connect to, and provide disk storage for, one or more host computers (“hosts”) over logical network connections (preferably TCP/IP sockets). In one embodiment, each host can maintain one or more socket connections to each storage server, over which multiple I/O operations may be performed concurrently in a non-blocking manner. The physical storage of a storage server may optionally be divided into…
System and method for granting arbitrated bids in the switching of information
Granted: September 9, 2008
Patent Number:
7424013
A system and method are provided for fairly distributing grants for access to switch outputs, through crossbars, between switch input channels. Crossbars are granted access between specified switch inputs and switch outputs, and the least recently used input channels are associated with selected switch outputs. A history of the previous channel transaction is maintained for each switch output, and channels are nominated in a rotation through a priority channel list. The present invention…
Asymmetric coherency protection
Granted: September 9, 2008
Patent Number:
7424496
Prior to updating a database entry, an update task invalidates a valid indicator (e.g., a bit) associated with the database entry. The update task waits for any other tasks (e.g., user tasks) that are accessing the database entry to complete their processing. In particular, a synchronization register holds a synchronization entry (e.g., a bit) for each user task that is created by a micro controller. The update task sets each synchronization entry of the synchronization register to a…
Logic for synchronizing multiple tasks at multiple locations in an instruction stream
Granted: September 2, 2008
Patent Number:
7421693
Logic (also called “synchronizing logic”) in a co-processor (that provides an interface to memory) receives a signal (called a “declaration”) from each of a number of tasks, based on an initial determination of one or more paths (also called “code paths”) in an instruction stream (e.g. originating from a high-level software program or from low-level microcode) that a task is likely to follow. Once a task (also called “disabled” task) declares its lack of a future need to…
System and method for selectivity etching an integrated circuit
Granted: July 22, 2008
Patent Number:
7402469
A method is provided for selectively marking a region of integrated circuit (IC). The method provides an IC die with a first region located on a backside surface of a bulk silicon (Si) layer. A semi-transparent film is formed overlying the bulk Si layer, semi-transparent to light having a first wavelength. The semi-transparent film is irradiated with light having the first wavelength in the range of 1 to 2 microns. In response to irradiating the semi-transparent film with a first power…
Architecture for providing block-level storage access over a computer network
Granted: June 24, 2008
Patent Number:
7392291
A network-based storage system comprises one or more block-level storage servers that connect to, and provide disk storage for, one or more host computers (“hosts”) over logical network connections (preferably TCP/IP sockets). In one embodiment, each host can maintain one or more socket connections to each storage server, over which multiple I/O operations may be performed concurrently in a non-blocking manner. The physical storage of a storage server may optionally be divided into…
Method and apparatus for bridging network protocols
Granted: May 20, 2008
Patent Number:
7376149
Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fibre Channel…
Reassembly of data fragments in fixed size buffers
Granted: May 13, 2008
Patent Number:
7372864
A reassembly and/or a segmentation function is spread across (i.e. partially performed in) each of two (or more) network processors, with use of buffers in a storage device to temporarily buffer data that is received in one or more ingress data units. In using the buffers, no attempt is made to completely fill each buffer. Instead, filling of data into a current buffer is stopped (and the remainder of current buffer is filled with padding) if there is no more data available, or if…
Transmission of data frames as a plurality of subframes over a plurality of channels
Granted: April 22, 2008
Patent Number:
7362779
A data communication system includes a rotating deinterleaver that reformats incoming data frames into a plurality of data subframes. The data contained in the incoming data frames is deinterleaved according to a protocol that distributes frame alignment signals periodically within the individual data subframes. The distribution of the frame alignment signals in the data subframes facilitates subframe alignment and subsequent recreation of the data frames from the data contained in the…
System and method for tolerating data link faults in a packet communications switch fabric
Granted: April 1, 2008
Patent Number:
7352694
A system and method are provided for tolerating data line faults in a packet communications switch fabric. The method comprises: accepting information packets including a plurality of cells, at a plurality of ingress port card ports, the plurality of information packets addressing a plurality of egress port card ports; selectively connecting port card ports to port card backplane data links; selectively connecting port card backplane data links and crossbars; sensing a connection fault…
Storage system with disk drive power-on-reset detection and recovery
Granted: March 4, 2008
Patent Number:
7340576
A disk array controller reliably detects disk drive power-on-reset events that may cause a disk drive that has uncommitted write data stored in its cache to lose such data. The methods for detecting the power-on-reset events include operating the disk drives in an ATA security mode in which a power-on-reset of a disk drive will cause the drive to enter a locked state in which data transfer commands are aborted; and tracking power cycle count attributes of the disk drives over time. When…
Flexible interconnect cable with grounded coplanar waveguide
Granted: February 26, 2008
Patent Number:
7336139
A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure. The cable can be coupled to destination components using a variety of connection techniques. The cable can also be…
Macros to support structures for an assembler that does not support structures
Granted: February 26, 2008
Patent Number:
7337438
An assembler incapable of supporting structures of the type supported in the “C” language receives and processes an assembly language program that contains one or more definitions of structures, structure instantiations and structure uses. Specifically, structure definitions are presented in the form of macro definitions. Moreover, a name to be used to identify the structure is passed as a parameter to the macro being defined (also called “structure-definition macro”).…
Signal routing in a node of a 1:N automatic protection switching network
Granted: February 5, 2008
Patent Number:
7327672
Automatic protection switching is implemented by channel devices in a data communication system node. Each channel devices includes input and output ports, a data receive port, a data send port, and a signal routing arrangement controlled by a processor element. The signal routing arrangement routes data between the channel devices such that, in the event of a channel failure, one channel device functions as a protection channel device. In a normal operating mode, each channel device…
Differential receiver circuit with electronic dispersion compensation for optical communications systems
Granted: January 22, 2008
Patent Number:
7321621
The invention describes a number of differential, balanced high-speed circuits that permit the design of a receiver with Electronic Dispersion Compensation (EDC) on a single semiconductor substrate, including the functions of an analog Fast Forward Equalizer (FFE), a Clock and Data Recovery, a Decision Feedback Equalizer (DFE), enhanced by additional circuits that permit control of the slicing level to compensate for pulse distortion, and control of the phase offset to set the optimal…
