AUTONOMOUS PROCESS CONTROL PERIPHERAL
Granted: July 5, 2018
Application Number:
20180188699
An updated process parameter to an autonomous process control peripheral is autonomously obtained when made available by a process monitor peripheral, such as an analog-to-digital converter (ADC). The input can be obtained in response to a system event, such as a completed ADC conversion. The autonomous process control peripheral can compute an updated control variable each time the process variable is updated. When the updated control variable is calculated by the autonomous process…
Serial Device with Configuration Mode for Changing Device Behavior
Granted: June 21, 2018
Application Number:
20180173669
Systems, methods, circuits, devices and computer-readable mediums for configuring serial devices are disclosed. In some implementations, a device comprises: an input for receiving first and second requests from a serial bus; a decoder coupled to the input and configured to determine if either of the first and second requests is a configuration mode request; a controller coupled to the decoder and configured to: in response to a determination that the first request is a configuration mode…
AUTOMATIC TRANSMISSION OF DUMMY BITS IN BUS MASTER
Granted: June 21, 2018
Application Number:
20180173657
Various embodiments are disclosed for automatic transmission of dummy bits in a serial bus master. The disclosed embodiments allow a single DMA descriptor to be fetched from memory for the reception of a specified amount of data. Dummy bits can be located or generated in the serial bus master either as a user configurable value or a default value. Logic in the serial bus master initiates a data transfer by writing a count value representing an amount of data to be received to a count…
Low Cost Cryptographic Accelerator
Granted: March 29, 2018
Application Number:
20180089467
A low-cost cryptographic accelerator is disclosed that accelerates inner loops of a cryptographic process. The cryptographic accelerator performs operations on cryptographic data provided by a central processing unit (CPU) running a software cryptographic process to create a combined hardware and software cryptographic process, resulting in a lower cost secure communication solution than software-only or hardware-only cryptographic processes. In an embodiment, a cryptographic accelerator…
APPARATUS FOR LOCKING AND/OR UNLOCKING
Granted: March 8, 2018
Application Number:
20180068509
An apparatus for locking and/or unlocking, in particular for an access and/or drive authorization and/or for other services in a motor vehicle in the type of a keyless entry/go functionality, for a wireless remote control or the like comprising a first device in the motor vehicle and an associated second device designed in the type of an electronic key, an ID-transponder, a chip card or the like, wherein both devices for the intended operation have transmitters and/or receivers for…
APPARATUS FOR ACTIVATING AN ELECTRICALLY OR ELECTRONICALLY CONTROLLED APPLIANCE FROM AN ENERGY-SAVING PASSIVE STATE
Granted: March 8, 2018
Application Number:
20180067540
An apparatus for activating an electrically or electronically controlled appliance from an energy-saving passive state, especially a locking system for locking and/or unlocking, in particular for an access and/or authorization and/or for other services for a wireless remote control, for controlling of front doors, for motor vehicles, or the like comprising a first device in the appliance and an associated second device designed in the type of an electronic key, an ID-transponder, a chip…
SELF-SETTING/RESETTING LATCH
Granted: February 22, 2018
Application Number:
20180054189
A self-setting/resetting latch circuit is disclosed that includes resistive loads for inverters used for setting and clearing the latch. In a first embodiment, the resistive loads cause the latch circuit to automatically set in response to a power supply voltage going low. In an alternate embodiment, the latch circuit is configured to be self-resetting or self-clearing when the power supply voltage goes low by reversing the set and clear terminals of the latch circuit and selecting a…
MEMORY EMULATION MECHANISM
Granted: February 15, 2018
Application Number:
20180046582
In an embodiment, a method comprises: obtaining a virtual bus address; translating the virtual bus address to a physical address of a portion of NVM storing first data; determining that the first portion of NVM has been allocated previously; reading the first data from the first portion of NVM; determining whether writing second data to the first portion of the NVM would change one or more bits in the first data; responsive to the determining that a write operation only changes data bits…
Automatic Gain Control for Received Signal Strength Indication
Granted: February 8, 2018
Application Number:
20180041179
In some implementations, an automatic gain control (AGC) circuit comprises: a pre-divider circuit operable to pre-divide an input signal according to a pre-divider circuit setting and output a pre-divided signal; a pre-amplifier operable to pre-amplify the pre-divided signal and output a pre-amplified signal; a post-divider circuit operable to post-divide the pre-amplified signal according to a post-divider circuit setting; an analog-to-digital converter (ADC) operable to generate a…
SECURITY EXTENSIONS FOR NON-VOLATILE MEMORY
Granted: January 25, 2018
Application Number:
20180024781
The disclosed embodiments provide security extensions for memory (e.g., non-volatile memory) by means of address and data scrambling and differential data storage to minimize exposure to side channel attacks and obfuscate the stored data. The scrambling function maximizes reverse engineering costs when recovering sequences of secret keys.
ANTENNA ON INTEGRATED CIRCUIT PACKAGE
Granted: January 18, 2018
Application Number:
20180019216
An antenna on integrated circuit (IC) package is disclosed. In an embodiment, an IC package comprises: a substrate; a radio frequency (RF) transceiver attached to the substrate; mold compound encapsulating the substrate; a shield layer formed on the mold compound; and one or more vias extending vertically through the shield layer and the mold compound, providing a conductive path to the RF transceiver. In another embodiment, a method comprises: attaching a radio frequency (RF)…
Inter-Process Signaling Mechanism
Granted: January 11, 2018
Application Number:
20180011804
The disclosed embodiments provide a mechanism to support implementation of semaphores or messaging signals between masters in a multi-master system, or between tasks in a single master system. A semaphore flag register contains one or more bits indicating whether resources are free or busy. The register is aliased to allow atomic read-and-clear of individual bits in the register. Masters poll the status of a resource until the resource reads as free. Alternatively, interrupts or events…
Active Stylus with Multiple Sensors for Receiving Signals from a Touch Sensor
Granted: December 14, 2017
Application Number:
20170357338
In one embodiment, a stylus includes a first sensor disposed proximate a first end of the stylus. The first sensor is adapted to receive a first receive signal via a first capacitive coupling with a touch sensor of a device. The first end of the stylus is at a tip-end of the stylus. The stylus also includes a second sensor disposed proximate the first end of the stylus. The second sensor is adapted to receive a second receive signal via a second capacitive coupling with the touch sensor…
ELECTRONIC PACKAGE
Granted: November 9, 2017
Application Number:
20170323845
The disclosed embodiments of electronic packages include electrical contact pad features present on all sides of the package that facilitate simple and low cost electrical connections to the package made through a mechanical contacting scheme. In an embodiment, an electronic package comprises: a metal leadframe having a first leadframe portion having a first thickness and a second leadframe portion having a second thickness that is less than the first thickness, the second leadframe…
DRIVEN SHIELD CONTROL
Granted: October 26, 2017
Application Number:
20170308219
In an embodiment, a circuit comprises: an analog driver operable to drive a sensor voltage on a capacitive sensor; a digital driver; a shield drive control coupled to the analog driver and the digital driver, the shield drive control operable to: during a one or more phases of a capacitive measurement of the capacitive sensor, disable the analog driver and enable the digital driver to drive a driven shield; and during one or more other phases of a capacitive measurement of the capacitive…
Message Translator
Granted: October 19, 2017
Application Number:
20170300444
Systems, methods, circuits and computer-readable mediums for a network message translator are disclosed. In an embodiment, a device includes a host processor and a translator. The host processor is configured to process messages and the translator is operable to: receive a first message from the host processor, the first message having a first frame format that is associated with a data time window; translate the first message into a first translated message having a second frame format…
SYSTEM ARCHITECTURE WITH SECURE DATA EXCHANGE
Granted: May 18, 2017
Application Number:
20170139851
In an embodiment, a system comprises: a first bus; a second bus; a first peripheral coupled to the first bus and the second bus, the first peripheral configured to receive a command from the first bus and to generate data in response to the first command; and a second peripheral coupled to the first bus and the second bus, the second peripheral configured to initiate transfer of the generated data from the first peripheral to the second peripheral over the second bus such that access to…
CURRENT REGULATOR WITH REGULATED SUPPLY VOLTAGE
Granted: April 6, 2017
Application Number:
20170098994
In an embodiment, a circuit comprises: a current regulator configured to selectively couple a first voltage supply to an energy storage device coupled to a load to regulate current through the load; and a voltage regulator configured to selectively couple a charge storage device to the load and to regulate a second voltage supply provided by the charge storage device.
PROACTIVE QUALITY OF SERVICE IN MULTI-MATRIX SYSTEM BUS
Granted: January 19, 2017
Application Number:
20170017593
A multi-matrix bus system is disclosed that provides proactive quality of service (QoS) by propagating, as soon as possible through an arbitration node in a network transfer request path, a highest priority value coming from an upstream arbitration node or master that has a current bus request pending at the arbitration node. The bus system ensures that any last downstream arbitration node knows at any time which is the highest priority request pending in the network transfer request…
PULSE WIDTH MODULATION CONTROLLER ARCHITECTURES
Granted: December 29, 2016
Application Number:
20160380529
Systems, apparatuses, and techniques for pulse width modulation (PWM) are described. A described system includes a circuit that contains an inductor and a transistor that controls current through the inductor based on a PWM signal to produce an output; and a controller to provide the PWM signal, which includes PWM cycles that include on-durations and off-durations. The controller can receive a first signal indicating an input voltage that is applied to the inductor, receive a second…
