SIGN DETECTION IN MULTI-DIMENSIONAL SIGNAL MEASUREMENTS
Granted: September 22, 2016
Application Number:
20160275734
Systems, methods, circuits and computer-readable mediums are disclosed for sign detection in multi-dimensional signal measurements. In some implementations, orthogonally oriented antennas are configured to generate signals in response to a magnetic field, where the signals correspond to components of magnetic field vectors in space. A circuit is coupled to the antennas and configured to: determine polarities of the signals based on phase measurements between the signals; reduce a…
TRANSMITTER-RECEIVER CIRCUIT AND METHOD FOR DISTANCE MEASUREMENT BETWEEN A FIRST NODE AND A SECOND NODE OF A RADIO NETWORK
Granted: July 21, 2016
Application Number:
20160209505
A transmitter-receiver circuit and a method for distance measurement between a first node and a second node of a radio network is provided, wherein a mode of the first node and a mode of the second node are switched from a normal mode for communication in the radio network to a mode for distance measurement, wherein, in the mode for distance measurement for a transit time measurement, a radio signal is transmitted by the first node and received by the second node and a radio signal is…
Distance Measurement Between Two Nodes of a Radio Network
Granted: June 23, 2016
Application Number:
20160178744
In certain embodiments, a method includes transmitting, by a first node, a first signal with a first frequency. The method includes receiving a second signal with a second frequency by downmixing the second signal to an intermediate frequency. The method includes determining a first value of a first phase for the second frequency. The method includes transmitting a third signal with a third frequency, the first frequency and the third frequency having a frequency difference, and…
CIRCUIT OF A NODE AND METHOD FOR TRANSIT TIME MEASUREMENT IN A RADIO NETWORK
Granted: May 12, 2016
Application Number:
20160135003
A circuit of a node in a radio network and method for transit time measurement between a first node and a second node of a radio network is provided. A frame is transmitted by the first node, wherein the frame requires an acknowledgment of reception by the second node. A first point in time of the transmission of the frame is established by the first node by a time counter. The frame is received by the second node at a second point in time. The acknowledgment is transmitted by the second…
Low-Power And Low-Frequency Data Transmission For Stylus
Granted: February 18, 2016
Application Number:
20160048227
In one embodiment, a method includes initiating an acquisition of a first signal from an electrode of a touch sensor according to an acquisition frequency of the touch sensor. The method also includes reversing, with a controller, a polarity of the first signal to produce a second signal. The method also includes storing a first modulated signal at an end of the acquisition of the first signal, where the first modulated signal includes the second signal as modulated by one or more…
INTELLIGENT CURRENT DRIVE FOR BUS LINES
Granted: June 4, 2015
Application Number:
20150155868
An intelligent current drive is disclosed that couples an active current source to a bus line to increase the rate of pull-up and decouples the active current source from the bus line prior to reaching the desired pull-up voltage.
FORMING RECESSED STRUCTURE WITH LIQUID-DEPOSITED SOLUTION
Granted: May 28, 2015
Application Number:
20150144883
A damascene approach is used to form a recessed structure in a substrate for receiving liquid-deposited solution, such as a carbon nanotube (CNT) solution. The liquid-deposited solution is built-up in the recessed structure, simplifying the coating process and providing a more uniform thickness of the liquid-deposited layer.
CALIBRATING TEMPERATURE COEFFICIENTS FOR INTEGRATED CIRCUITS
Granted: May 21, 2015
Application Number:
20150137896
A calibration system and method are disclosed that include a first bias current generator configured for generating a first bias current that is proportional to absolute temperature (PTAT) and a second bias current generator configured for generating a second bias current that is complementary to absolute temperature (CTAT). The first and second bias currents are copied, multiplied and then summed into a total output bias current, which can be used to bias an electronic circuit. A…
CONFIGURING POWER DOMAINS OF A MICROCONTROLLER SYSTEM
Granted: April 2, 2015
Application Number:
20150095681
A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain based on whether the microcontroller system has asserted a power trigger for any module in the power domain or if any module in the power domain has asserted a power keeper.
SOFTWARE CODE PROFILING
Granted: March 5, 2015
Application Number:
20150067661
An on-chip function call aware software code profiling counter system and method is disclosed. When building software code a compiler/tool-chain can modify prologues and epilogues of functions to add instrumentation code which uniquely identifies the function. Each function included in the instrumented source code tree is assigned a unique identifier (ID) by the compiler/tool-chain. Writing a unique ID for a function to a register starts profiling for the function. The profiling is…
MULTI-PROTOCOL SERIAL COMMUNICATION INTERFACE
Granted: March 5, 2015
Application Number:
20150067206
Systems and methods for multi-protocol serial communication interfaces are described. One example system includes an interface module including a buffer for storing a protocol selection. The system includes a protocol module coupled to the interface module and configured for providing one or more serial communication protocols. Based on the protocol selection, one of the serial communication protocols is selected. The system also includes a serial engine module coupled to the interface…
BREAKING CODE EXECUTION BASED ON TIME CONSUMPTION
Granted: February 26, 2015
Application Number:
20150058827
An on-chip system uses a time measurement circuit to trap code that takes longer than expected to execute by breaking code execution on excess time consumption.
SMART GRID APPLIANCE CONTROL
Granted: February 19, 2015
Application Number:
20150048679
Systems and methods for controlling small grids of appliances are described. One sample method includes receiving consumption data from a plurality of electrical appliances that are plugged into outlets at a first location and monitoring power usage at the first location. The method includes evaluating the received consumption data to identify one or more predetermined conditions in one or more of the plurality of electrical appliances and evaluating stored data related to power…
MEASURING POWER CONSUMPTION OF CIRUIT COMPONENT OPERATING IN RUN MODE
Granted: January 29, 2015
Application Number:
20150028898
A sense resistor is coupled between a power source and one or more power pins of an integrated circuit (IC) chip including a circuit component (e.g., a microcontroller unit (MCU)). An on-chip amplifier (e.g., a programmable gain amplifier or op-amp) amplifies the voltage drop over the sense resistor to a level that is within the dynamic range of an on-chip analog-to-digital converter (ADC). In some implementations, the measured signals can be time-stamped and stored in a trace buffer and…
MEASURING POWER CONSUMPTION OF CIRUIT COMPONENT OPERATING IN ULTRA-LOW POWER MODE
Granted: January 29, 2015
Application Number:
20150028887
By powering an electronic component operating in an ultra-low power mode from a pre-charged measuring capacitor and measuring the time to discharge the capacitor to a trip voltage level, measurement data can be obtained. In some implementations, the capacitance of the capacitor can be obtained by adding a known current to the unknown current drawn from the capacitor and calculating the capacitance using a mathematical formula.
ACTIVE VALLEY FILL POWER FACTOR CORRECTION
Granted: November 20, 2014
Application Number:
20140340943
A power converter is disclosed that includes an active valley fill (AVF) capacitor that is actively switched to provide current to a load during a portion of an alternating current (AC) input cycle. The current supplied to the load includes some current supplied by the AC input and some current supplied by the AVF capacitor. Circuitry is configured to regulate the amount of current flowing through the load, including controlling the amount of current supplied by the AVF capacitor. The…
GENERATING KEYS USING SECURE HARDWARE
Granted: September 18, 2014
Application Number:
20140281554
A client device that is coupled to a host device sends a parent public key and an associated certificate to the host device. The parent public key, the certificate and a corresponding parent private key are stored in secure persistent storage included in a secure device associated with the client device. The client device receives instructions from the host device for generating a child private and public key pair. In response to receiving the instructions, the client device generates a…
CONTROLLING SWITCHING CURRENT REGULATORS
Granted: September 18, 2014
Application Number:
20140265929
A switching current regulator controls a load current flowing through a load. The switching current regulator switches a switch to an ON state after applying a regulating signal to the switch. During an integration period while the switch is in the ON state, the switching current regulator integrates an output voltage based on a sense voltage based on the load current and a reference voltage; at the end of the integration period, the switching current regulator outputs an integrated…
CONFIGURABLE INTEGRATED CIRCUIT ENABLING MULTIPLE SWITCHED MODE OR LINEAR MODE POWER CONTROL TOPOLOGIES
Granted: September 11, 2014
Application Number:
20140253090
An integrated circuit is operable for implementing any of multiple switched mode or linear power control topologies. The integrated circuit includes a control unit, and functional blocks each of which includes circuitry. The control unit is operable selectively to enable particular ones of the functional blocks in response to an input signal indicative of a particular one of the switched mode or linear mode power control topologies.
Stored Authorization Status for Cryptographic Operations
Granted: September 11, 2014
Application Number:
20140258729
A hardware authentication device is disclosed that uses a cryptographic signature verification operation to authorize a subsequent cryptographic operation to be performed using the same or different keys and stores that authorization status in protected memory. The cryptographic algorithm may be an ECDSA signature, SHA-based Message Authentication Code (MAC) or any other cryptographic algorithm. The authorization status may be stored for a number of uses for a period of time or until a…
