Atmel Patent Applications

CAPACITIVE SENSOR

Granted: February 24, 2011
Application Number: 20110043226
Method and apparatus are provided for a capacitive sensor. In an example, a capacitive sensor can include a first sensing element, a sensing channel operable to generate a first signal indicative of first capacitance between the sensing element and a system ground, and a processor responsive to a change in the first capacitance between the first sensing element and ground. The processor can be configured to adjust a parameter value based on a first duration of the change in the first…

ANISOTROPIC TOUCH SCREEN ELEMENT

Granted: February 24, 2011
Application Number: 20110043482
A touch sensitive position sensor for detecting the position of an object in two dimensions is described. The position sensor has first and second resistive bus-bars spaced apart with an anisotropic conductive area between them. Electric currents induced in the anisotropic conductive area by touch or proximity flow preferentially towards the bus-bars to be sensed by detection circuitry. Because induced currents, for example those induced by drive circuitry, flow preferentially along one…

APPARATUS AND METHOD FOR BIT LINES DISCHARGING AND SENSING

Granted: February 24, 2011
Application Number: 20110044114
Some embodiments include first bit lines coupled to a first junction bus and second bit lines coupled to a second junction bus. Such embodiments can also include a first network to discharge at least one of the first bit lines through the first junction bus and to discharge at least one of the second bit lines through the second junction bus. Such embodiments can further include a second network to couple a sense amplifier to at least one of the first junction bus and the second junction…

Controlling Bias Current for an Analog to Digital Converter

Granted: February 17, 2011
Application Number: 20110037513
A converter includes an analog to digital converter having a bias current input, a control input, and an analog input to provide a digital output as a function of the analog input. A bias module is coupled to the bias current input to provide bias current to the analog to digital converter. A controller is coupled to the bias module and to the control input of the analog to digital converter. The controller controls the analog to digital converter to sample an analog input and controls…

Device and Method for Scanning Multiple ADC Channels

Granted: February 17, 2011
Application Number: 20110037634
An analog to digital converter has an input for coupling to multiple channels having analog signals. The analog to digital converter converts the analog signals on such channels to provide a digital output. A memory device has an enable bit for each of the multiple channels and a current channel register. An interface coupled to the memory device and current channel register selects a next channel for converting by the analog to digital converter, skipping channels that are not enabled.

TOUCH-SENSITIVE USER INTERFACE

Granted: February 17, 2011
Application Number: 20110037705
A touch-sensitive user interface includes a sensor element providing a plurality of sensing areas, a measurement circuit coupled to the sensor element and operable to iteratively acquire measurement signal values indicative of the proximity of an object to the respective sensing areas, and a processor operable to receive the measurement signal values from the measurement circuit and to classify a sensing area as an activated sensing area for a current iteration according to predefined…

LEVEL SHIFTER WITH OUTPUT LATCH

Granted: February 10, 2011
Application Number: 20110032019
A level shifter for a microcontroller shifts an input voltage in a first power domain to an output voltage level consistent with a second power domain. The level shifter is enabled to shift the voltages when both power domains are operative.

Parallel Antennas for Contactless Device

Granted: February 3, 2011
Application Number: 20110025463
An electronic information device includes an integrated circuit embedded within the device. The electronic information device further includes a first antenna that is embedded within the device and is connected to the integrated circuit. The electronic information device further includes a second antenna that is embedded within the device and is connected to the integrated circuit. The first antenna is oriented within a first plane and the second antenna is oriented within a second plane…

Differential Sense Amplifier

Granted: February 3, 2011
Application Number: 20110026347
A differential sense amplifier can perform data sensing using a very low supply voltage.

CAPACITIVE KEYBOARD WITH NON-LOCKING REDUCED KEYING AMBIGUITY

Granted: January 27, 2011
Application Number: 20110018744
Keyboards, keypads and other data entry devices can suffer from a keying ambiguity problem. In a small keyboard, for example, a user's finger is likely to overlap from a desired key to onto adjacent ones. An iterative method of removing keying ambiguity from a keyboard comprising an array of capacitive keys involves measuring a signal strength associated with each key in the array, comparing the measured signal strengths to find a maximum, determining that the key having the maximum…

Two-Dimensional Position Sensor

Granted: January 27, 2011
Application Number: 20110018841
A capacitive position sensor for determining the position of an object along first and second directions is described. The sensor comprises a substrate having an arrangement of electrodes mounted on a single surface thereof. The electrodes are arranged so as to define an array of sensing cells arranged in columns and rows to form a sensing area. Each of the sensing cell including a column sensing electrode and a row sensing electrode with the column sensing electrodes of sensing cells in…

CAPACITIVE POSITION SENSOR

Granted: January 27, 2011
Application Number: 20110022351
A sensor for determining a position for an adjacent object in two dimensions is described. The sensor comprises a substrate with a sensitive area defined by a pattern of electrodes, wherein the pattern of electrodes includes a first group of drive elements interconnected to form a plurality of row electrodes extending along a first direction, a second group of drive elements interconnected to form a plurality of column electrodes extending along a second direction, and a group of sense…

RANDOMIZED MODULAR POLYNOMIAL REDUCTION METHOD AND HARDWARE THEREFOR

Granted: January 20, 2011
Application Number: 20110016167
A cryptographically secure, computer hardware-implemented binary finite-field polynomial modular reduction method estimates and randomizes a polynomial quotient used for computation of a polynomial remainder. The randomizing error injected into the approximate polynomial quotient is limited to a few bits, e.g. less than half a word. The computed polynomial remainder is congruent with but a small random multiple of the residue, which can be found by a final strict binary field reduction…

STACKABLE PACKAGES FOR THREE-DIMENSIONAL PACKAGING OF SEMICONDUCTOR DICE

Granted: January 20, 2011
Application Number: 20110014747
An apparatus and a method for packaging semiconductor devices. The apparatus includes a substrate strip component of a leadless three-dimensional stackable semiconductor package having mounting contacts on, for example, four peripheral edges. The substrate strip may either be fabricated for mounting a single electrical component (e.g., an integrated circuit die) or a plurality of substrate strips may be laid out in an X-Y matrix pattern which may later be singulated into individual…

Efficient Display Driver

Granted: January 20, 2011
Application Number: 20110012886
A driver circuit for a display device (e.g., an LCD) omits buffers and a resistive ladder and connects the output of a switched regulator directly to a display device through a selector switch. Voltage inputs for the display device can be selectively coupled to the output of the switched regulator using the selector switch. Each voltage input can be coupled to a capacitor that is charged when the corresponding voltage input is coupled to the high voltage output of the switched regulator.…

MULTI-COMPONENT ELECTRONIC PACKAGE

Granted: January 6, 2011
Application Number: 20110001215
An electronic multi-component package is assembled by placing multiple electronic components within multiple openings of a package substrate, then depositing and curing adhesive filler in gaps between the components and the inner peripheries of the openings. Circuit features, including conductive interconnects, are formed by thin-film photolithography over both front and back surfaces of the package substrate. Preformed conductive vias through the package substrate provide electrical…

APPARATUS AND METHODS FOR SENSE AMPLIFIERS

Granted: December 30, 2010
Application Number: 20100329059
Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell; and a second circuit including a second circuit path coupled between the supply node and the line to charge the line during the memory…

SENSE AMPLIFIER APPARATUS AND METHODS

Granted: December 30, 2010
Application Number: 20100329023
Some embodiments include apparatus and methods having a sense amplifier unit, a supply node to receive a supply voltage, and a line coupled to a memory cell of a device. The sense amplifier unit includes a circuit path coupled between the supply node and the line to carry a current having a value based on a value of information stored in the memory cell. Additional embodiments are disclosed.

HIGH-DENSITY NON-VOLATILE READ-ONLY MEMORY ARRAYS AND RELATED METHODS

Granted: December 16, 2010
Application Number: 20100315856
In an embodiment, a read-only memory array includes a plurality of word lines, a plurality of bit-lines including first and second bit-lines, and a plurality of memory cells configured to represent data values. Each memory cell can include a transistor having a control terminal coupled to one of the plurality of word lines, a drain terminal, and a source terminal. Connections associated with the drain and source terminals of a particular memory cell can determine a data value represented…

ROM ARRAY WITH SHARED BIT-LINES

Granted: December 16, 2010
Application Number: 20100315855
Electronic apparatus, methods of forming the electronic apparatus, and methods of operating the electronic apparatus include a read only memory having a memory array of bit-lines, where the bit-lines are arranged such that each bit-line has a shared arrangement with one or more other bit-lines of the memory array. Each shared arrangement is structured to operably store a plurality of bits.