Analog to Digital Converter
Granted: March 11, 2010
Application Number:
20100060494
An analog to digital converter (ADC) can operate in an amplifier configuration or a converter configuration. In the amplifier configuration, the ADC receives an input voltage and scales the input voltage by a factor during at least one clock cycle. In the converter configuration, the ADC uses the scaled input voltage to determine a digital value corresponding to the input voltage.
METHOD AND SYSTEM TO ACCESS MEMORY
Granted: March 11, 2010
Application Number:
20100061152
This document discusses among other things, a system comprising a host controller, an Input/Output buffer, and a memory device. The memory device is coupled to the host controller and is configured to receive a read command from the host controller. The non-volatile includes an interface control logic, which is in communication with a non-volatile memory. The interface control logic includes a latency programming circuit coupled to the non-volatile memory and the Input/Output buffer. The…
DATA SECURITY
Granted: March 11, 2010
Application Number:
20100064144
This document discloses data security systems and methods of securing data. A cache memory can be connected between a decryption engine and a central processing unit (“CPU”) to increase security of encrypted data that is stored in a datastore. The decryption engine can retrieve the encrypted data from the datastore, decrypt the data, and store the decrypted data in the cache. In turn, the decrypted data can be accessed by the CPU. The data can be encrypted with a secret key, so that…
SEMICONDUCTOR PROCESSING
Granted: March 11, 2010
Application Number:
20100059508
This document discloses semiconductor processing systems, methods, and devices. The systems, methods and devices activate dopants in a processing chamber having a temperature that is less than, for example, 300 degrees. A microwave energy source provides a microwave transmission to a waveguide system that uniformly distributes the microwave transmission. The waveguide system can include a rectangular waveguide coupled to a cylindrical waveguide. The rectangular waveguide guides the…
METHOD FOR FORMING AN INTEGRAL ELECTROMAGNETIC RADIATION SHIELD IN AN ELECTRONIC PACKAGE
Granted: March 4, 2010
Application Number:
20100051343
A method and system for fabricating an integral electromagnetic radiation shield for an electronics package is disclosed. Various embodiments include exposing a portion of at least one ground contact feature in an electronic package by removing a portion of the electronic package above the at least one ground contact feature to form at least one trench above the at least one ground contact feature; depositing electromagnetic radiation shield material in the at least one trench to…
LOW VARIATION RESISTOR
Granted: March 4, 2010
Application Number:
20100052840
This document discloses low variation resistor devices, methods, systems, and methods of manufacturing the same. In some implementations, a low-variation resistor can be implemented with a metal-oxide-semiconductor field-effect-transistor (“MOSFET”) operating in the triode (e.g., ohmic) region. The MOSFET can have a source that is connected to a reference voltage (e.g., ground) and a gate connected to a gate voltage source. The gate voltage source can generate a gate voltage that…
Digital-to-Analog Converter
Granted: March 4, 2010
Application Number:
20100052963
A PRA-DAC is disclosed. The PRA-DAC is operable to increase its conversion speed.
SECURE INFORMATION PROCESSING
Granted: March 4, 2010
Application Number:
20100057960
Apparatus, systems, and methods may operate to receive from a requesting device, at a memory device, a request to access a memory domain associated with the memory device, and to deny, by the memory device, the request if the memory domain comprises any part of a secure domain, and the requesting device has not asserted a secure transfer indication. Additional operations may include granting the request if the memory domain comprises some part of the secure domain and the requesting…
Capacitive Touch Screen with Noise Suppression
Granted: February 25, 2010
Application Number:
20100044122
A capacitive touch sensor wherein the touch sensitive panel has drive electrodes arranged on the lower side of a substrate and sense electrodes arranged on the upper side. The drive electrodes are shaped and dimensioned to substantially entirely cover the touch sensitive area with individual drive electrodes being separated from each other by small gaps, the gaps being so small as to be practically invisible. The near blanket coverage by the drive electrodes also serves to screen out…
Capacitive Position Sensor
Granted: February 25, 2010
Application Number:
20100045632
A capacitive position sensor has a two-layer electrode structure. Drive electrodes extending in a first direction on a first plane on one side of a substrate. Sense electrodes extend in a second direction on a second plane on the other side of the substrate so that the sense electrodes cross the drive electrodes at a plurality of intersections which collectively form a position sensing array. The sense electrodes are provided with branches extending in the first direction part of the way…
Leadless Package with Internally Extended Package Leads
Granted: February 18, 2010
Application Number:
20100038759
A DFN package includes internally extended package leads. One or more package pads are physically and electrically extended from a first edge of the package to a second, opposite edge of the package. These extended package leads can terminate at the edges of the leadframe. The package pads and the extended package leads where the IC die is attached can have full leadframe thickness. Other extended package lead features can have a reduced leadframe thickness (e.g., about half the…
Metal Leadframe Package with Secure Feature
Granted: February 18, 2010
Application Number:
20100038760
A fabrication method for a BGA or LGA package includes a low-cost metal leadframe with internally extended leads. I/O attach lands can be placed at any location on the metal leadframe, including the center of the package. An I/O attach land can be fabricated at any position upon an extended lead (e.g., near the center of the package). During fabrication of the package, an isolation saw cut to the bottom of the package can be used to electrically disconnect the leadframe circuit from the…
ONE-TIME-PROGRAMMABLE MEMORY EMULATION
Granted: February 11, 2010
Application Number:
20100037000
This document discloses one-time-programmable (“OTP”) memory emulation and methods of performing the same. OTP memory can be emulated by managing reads and writes to a memory array in response to an instruction to write data to a OTP memory location and selectively setting a security flag that corresponds to the memory locations. The memory array can be a NAND Flash memory array that includes multiple pages of memory. The memory array can be defined by memory blocks that can include…
EX-SITU COMPONENT RECOVERY
Granted: January 28, 2010
Application Number:
20100018554
Disclosed herein are devices, methods and systems for ex-situ component recovery. The ex-situ recovery can be performed by desorbing or outgassing components of a processing system in a recovery system, rather than in the processing system itself. The recovery system can include a docking station and/or a heated vacuum chamber. The heated vacuum chamber can be used to desorb or outgas components that will be located inside the processing system, while the docking station can be used to…
Semiconductor Fabrication
Granted: January 28, 2010
Application Number:
20100019306
This document discloses devices fabricated on a semiconductor substrate and methods of fabricating the same. The devices can be memory cells having a tunnel window that is defined by dry-etching oxide to expose the semiconductor substrate and growing a tunnel oxide layer on the exposed semiconductor substrate. The semiconductor substrate can be decontaminated and/or repaired by exposing the semiconductor substrate to an optical irradiated energy source having a predefined energy that is…
METHOD FOR FABRICATING CONDUCTING PLATES FOR A HIGH-Q MIM CAPACITOR
Granted: January 28, 2010
Application Number:
20100019349
A method of forming one or more capacitors on or in a substrate and a capacitor structure resulting therefrom is disclosed. The method includes forming a trench in the substrate, lining the trench with a first copper-barrier layer, and substantially filling the trench with a first copper layer. The first copper layer is substantially chemically isolated from the substrate by the first copper-barrier layer. A second copper-barrier layer is formed over the first copper layer and a first…
Semiconductor Fabrication
Granted: January 28, 2010
Application Number:
20100022072
This document discloses devices fabricated on a semiconductor substrate and methods of fabricating the same. The devices can be memory cells having a tunnel window that is defined by dry-etching oxide to expose the semiconductor substrate and growing a tunnel oxide layer on the exposed semiconductor substrate. The semiconductor substrate can be decontaminated and/or repaired by exposing the semiconductor substrate to an optical irradiated energy source having a predefined energy that is…
USE OF RECOVERY TRANSISTORS DURING WRITE OPERATIONS TO PREVENT DISTURBANCE OF UNSELECTED CELLS
Granted: January 21, 2010
Application Number:
20100014354
A memory array and method for performing a write operation in a memory array that eliminates parasitic coupling between selected and unselected bitlines and protects memory cells on unselected bitlines. A memory array (100); has a plurality of memory cells (148, 150,152, 154), each of which is coupled to a unique array bitline (104, 106, 108,110). A unique recovery transistor (138; 140, 142, 144) coupled to each array bitline (104, 106, 108, 110). The recovery transistors (140, 144) on…
PRECHARGE AND EVALUATION PHASE CIRCUITS FOR SENSE AMPLIFIERS
Granted: January 21, 2010
Application Number:
20100014370
A precharge and evaluation circuit for a memory sense amplifier includes a first precharge-phase transistor having a source coupled to a power-supply potential, a gate coupled to a precharge control line, and a drain. A second precharge-phase transistor has a drain coupled to the drain of the first precharge-phase transistor, a source, and a gate coupled to the source through a feedback circuit. A first read-phase transistor has a source coupled to the power-supply potential, and a gate…
MICROCONTROLLER BASED FLASH MEMORY DIGITAL CONTROLLER SYSTEM
Granted: January 21, 2010
Application Number:
20100017563
Some embodiments includes a digital control system having a microcontroller for handling timed events, a command decoder for interpreting user commands, a separate burst controller for handling burst reads of the Flash memory, a program buffer for handling page writes to the Flash memory, a page transfer controller for handling data transfers from the Flash core to the program buffer as well as address control for page writes from the program buffer to the Flash memory, a memory control…
