Methods, circuits, devices and systems for integrated circuit voltage level shifting
Granted: October 25, 2016
Patent Number:
9479171
Disclosed is an integrated circuit voltage level shifter including: a first set of pull-up transistors to selectively pull an output voltage towards a high voltage source level based on an input; a second set of pull-down transistors adapted to selectively pull the output voltage towards a lower voltage source level based on the input and a third set of transistors to limit current flow through the second set of pull-down transistors and to mitigate snapback of the second set of…
Integrated circuit device with programmable analog subsystem
Granted: October 18, 2016
Patent Number:
9473144
An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
Protecting circuit and integrated circuit
Granted: October 18, 2016
Patent Number:
9472947
A protecting circuit includes: a discharge switch configured to connect to a first terminal and a second terminal; a trigger circuit comprising load devices configured to be connected in series between the first terminal and the second terminal, each of the load devices being configured to consume power; and a shunt circuit comprising, between the trigger circuit and the first terminal or the second terminal, at least one shunt pathway configured to be capable of bypassing at least one…
System with memory having voltage applying unit
Granted: October 18, 2016
Patent Number:
9472564
The present invention provides a system comprising a semiconductor device, a method of controlling the semiconductor device in the system, and a method of manufacturing the semiconductor device in the system. The semiconductor device includes: a semiconductor region located in a semiconductor layer formed on an isolating layer; an ONO film on the semiconductor region; bit lines on either side of the semiconductor region, which are located in the semiconductor layer, and are in contact…
Semiconductor device and fabrication method therefor
Granted: October 18, 2016
Patent Number:
9472563
A semiconductor device includes bit lines (12) that are provided in a semiconductor substrate (10) an ONO film (14) that is provided on the semiconductor substrate; word lines that are provided on the ONO film (14) and extend in a width direction of the bit lines (12); and a dummy layer (44) that extends in the width direction of the bit lines (12) and is provided in a bit-line contact region (40) having contact holes formed to connect the bit lines (12) with wiring layers (34). In…
ESD clamp with a layout-alterable trigger voltage and a holding voltage above the supply voltage
Granted: October 18, 2016
Patent Number:
9472511
An ESD device that includes a gate and an n-drain region isolated from the gate and formed at least partially within an n-well region, which in turn is formed at least partially within a deep n-well region. The doping levels of the n-drain region, the n-well region and the deep n-well region are in a descending order. The ESD device has trigger and holding voltages, above the operation voltage of its protected circuit, which are layout-configurable by altering the distance between the…
First-in-first-out (FIFO) memory devices and methods having multiple queuing
Granted: October 11, 2016
Patent Number:
9465576
A first-in-first-out (FIFO) memory device may include a plurality of memory locations configurable into M input queues comprising sequences of input data values and N output queues for storing sequences of output data values, wherein N is not equal to M.
Spacer formation with straight sidewall
Granted: October 11, 2016
Patent Number:
9466496
Disclosed herein is a semiconductor device comprising a first dielectric disposed over a channel region of a transistor formed in a substrate and a gate disposed over the first dielectric. The semiconductor device further includes a second dielectric disposed vertically, substantially perpendicular to the substrate, at an edge of the gate, and a spacer disposed proximate to the second dielectric. The spacer includes a cross-section with a perimeter that includes a top curved portion and…
Process for forming edge wordline implants adjacent edge wordlines
Granted: October 11, 2016
Patent Number:
9466489
A process for forming tilted edge wordline implants is disclosed. The process includes forming a first drain implant in a substrate, forming a first tilted implant in a substrate adjacent a first edge wordline to supplement said first drain implant where the first tilted implant is provided at a tilt angle from a first direction and forming a second tilted implant in the substrate adjacent a second edge wordline to supplement another first drain implant where the second tilted implant is…
Systems, methods, and apparatus for memory cells with common source lines
Granted: October 11, 2016
Patent Number:
9466374
Systems, methods, and apparatus are disclosed for implementing memory cells having common source lines. The methods may include receiving a first voltage at a first transistor. The first transistor may be coupled to a second transistor and included in a first memory cell. The methods include receiving a second voltage at a third transistor. The third transistor may be coupled to a fourth transistor and included in a second memory cell. The first and second memory cells may be coupled to…
Display control device to display image data
Granted: October 11, 2016
Patent Number:
9463692
In the display of an image including a fixed background image and a variation image of the background image, at least one of the amount of data to be held and the amount of work to be processed is reduced. A display control device acquires pixel description data including a combination of position information for specifying a position on a pixel array and address information for specifying an address in an image storage unit of image data which is displayed at the position specified by…
Low voltage detector
Granted: October 4, 2016
Patent Number:
9461562
An apparatus includes a voltage monitoring device to generate a brownout indication signal in response to a change in a power supply voltage. The apparatus also includes a mode control device to control a temporal response of the voltage monitoring device to the change in the power supply voltage based, at least in part, on a voltage level of the power supply voltage.
Method of forming controllably conductive oxide
Granted: October 4, 2016
Patent Number:
9461247
In fabricating a memory device, a first electrode is provided. An alloy is formed thereon, and the alloy is oxidized to provide an oxide layer. A second electrode is provided on the oxide layer. In a further method of fabricating a memory device, a first electrode is provided. Oxide is provided on the first electrode, and an implantation step in undertaken to implant material in the oxide to form a layer including oxide and implanted material having an oxygen deficiency and/or defects…
Oxide formation in a plasma process
Granted: October 4, 2016
Patent Number:
9460974
A method of making a semiconductor structure is provided. The method includes forming a tunneling layer overlying a first channel connecting a source and a drain. A charge storage layer is formed overlying the tunneling layer, the charge storage layer comprises forming a substantially trap free first layer over the tunneling layer, and forming a trap dense second layer over the first layer. Finally, a blocking structure is formed on the charge storage layer by plasma oxidation. A…
Multivariable transfer functions
Granted: October 4, 2016
Patent Number:
9459842
In one embodiment, a method for supporting multivariable functions of an application includes receiving user input pertaining to two or more variables associated with a multivariable function of the application, and then causing code for the function to be automatically generated to update the variables based on the user input.
HTO offset for long leffective, better device performance
Granted: September 27, 2016
Patent Number:
9455352
Memory devices having an increased effective channel length and/or improved TPD characteristics, and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line dielectrics between the memory cells. The memory cell contains a charge trapping dielectric stack, a poly gate, a pair of pocket implant regions, and a pair of bit lines. The bit line can be formed by an implant process at a higher energy level…
Power management system for high traffic integrated circuit
Granted: September 27, 2016
Patent Number:
9455027
An integrated circuit (IC) device can include a memory array section comprising a plurality of memory arrays that each include memory cells for storing data values; a data path section having switching circuits configured to enable data paths between the memory arrays and a plurality of input/outputs (I/Os) of the IC device; and a power fill control circuit configured to activate power-fill circuits in the IC device to perform non-mission mode operations that consume current, the amount…
Method for providing read data flow control or error reporting using a read data strobe
Granted: September 27, 2016
Patent Number:
9454421
Disclosed herein are system, apparatus, methods and/or combinations and sub-combinations thereof, for using a read data strobe signal received at a host device from a peripheral device to convey variable latency (flow) control or report an error in the data content read from the peripheral device. Reception of the read data strobe signal before a predetermined maximum latency time, provides variable latency control back to the host by indicating when valid data is available for capture.…
Autonomous control in a programmable system
Granted: September 20, 2016
Patent Number:
9448964
A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously…
Low standby power with fast turn on for non-volatile memory devices
Granted: September 20, 2016
Patent Number:
9449655
Systems and methods for driving a non-volatile memory device in a standby operating condition are disclosed. A standby detection circuit detects whether the non-volatile memory system is in a standby condition. In response to determining that the non-volatile memory system is in a standby condition, a bias control circuit provides bias currents to drivers of the non-volatile memory system in a standby mode.
