Cypress Semiconductor Patent Grants

DC-DC converter with adaptive phase compensation controller

Granted: February 2, 2016
Patent Number: 9252659
A DC-DC converter for generating an output voltage from input voltage, includes: an output stage for outputting the output voltage; an error amplifier having an input and a reference input for receiving a feedback voltage at the input in accordance with the output voltage and for receiving a reference voltage at the reference input, the error amplifier generating an amplified voltage for driving the output stage, the amplifier voltage corresponding to the difference between the feedback…

Formation of gate sidewall structure

Granted: February 2, 2016
Patent Number: 9252221
A semiconductor device having a gate stack on a substrate is disclosed. The gate stack may include a mask layer disposed over a first gate conductor layer. The first gate conductor layer may be laterally etched beneath the mask layer to create an overhanging portion of the mask layer. A sidewall dielectric can be formed on the sidewall of the first gate conductor layer beneath the overhanging portion of the mask layer. A sidewall structure layer can be formed adjacent to the sidewall…

Non-volatile memory with silicided bit line contacts

Granted: February 2, 2016
Patent Number: 9252154
An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density…

Output voltage controller, electronic device, and output voltage control method

Granted: January 26, 2016
Patent Number: 9246387
An output voltage controller includes a first controller which controls current supply to a inductor based on an output voltage, and a second controller which controls current supply to the inductor by controlling a period when an input end to which an input voltage is inputted, the inductor, and an output end from which the output voltage is outputted are coupled based on the input voltage.

Oro and orpro with bit line trench to suppress transport program disturb

Granted: January 26, 2016
Patent Number: 9245895
Memory devices having improved TPD characteristics and methods of making the memory devices are provided. The memory devices contain two or more memory cells on a semiconductor substrate and bit line openings containing a bit line dielectric between the memory cells. The memory cell contains a charge storage layer and a first poly gate. The bit line opening extends into the semiconductor substrate. By containing the bit line dielectric in the bit line openings that extend into the…

Semiconductor device and method of manufacturing the same

Granted: January 26, 2016
Patent Number: 9245774
The present invention provides a semiconductor device with an improved yield ratio and reduced height and manufacturing cost; and a method of manufacturing the semiconductor device. According to an aspect of the present invention, there is provided a semiconductor device including a substrate, a semiconductor element that is flip-chip connected to the substrate, and a molding portion that seals the semiconductor element. The side surfaces of the semiconductor element are enclosed by the…

User interface with child-lock feature

Granted: January 26, 2016
Patent Number: 9244576
Apparatuses and methods of touch discrimination are described. One method receives data from an occupant classification system and sets a touch detection threshold of a touch-sensing device based on the received data. The method may be used to discriminate between an adult touch and a child touch and to selectively allow access to control functionality to adults and not to children.

Method minimizing imprint through packaging of F-RAM

Granted: January 19, 2016
Patent Number: 9240440
A method of minimizing imprint in a ferroelectric capacitor uses a gradually attenuated AC field to electrically depolarize the ferroelectric capacitor before being packaged. The AC field is linearly attenuated, and generated using a series of voltage pulses, down to a minimum allowed voltage. A final pulse is a positive voltage to minimize hydrogen degradation during packaging. Thermal depoling can also be used.

Wordline resistance reduction method and structure in an integrated circuit memory device

Granted: January 19, 2016
Patent Number: 9240418
Methods and structures for reducing resistance in wordlines of an integrated circuit memory device are disclosed. In one embodiment, the method includes forming multiple columns of polycrystalline silicon for respective number of wordlines, forming core transistor junctions and periphery transistor junctions associated with the wordlines, performing a salicidation process for the periphery transistor junction and performing a salicidation process for the columns of polycrystalline…

Method for achieving very small feature size in semiconductor device by undertaking silicide sidewall growth and etching

Granted: January 12, 2016
Patent Number: 9236448
In the present method of fabricating a semiconductor device, initially, a semiconductor substrate is provided. An oxide layer is provided on and in contact with the substrate, and a polysilicon layer is provided on and in contact with the oxide layer. A layer of photoresist is provided on the polysilicon layer, and the photoresist is patterned to provide a photoresist body, which is used as a mask to etch away polysilicon and oxide, forming a polysilicon element thereunder. The…

Convex shaped thin-film transistor device having elongated channel over insulating layer

Granted: January 5, 2016
Patent Number: 9231112
The present invention provides a semiconductor device that has a shorter distance between the bit lines and easily achieves higher storage capacity and density. The semiconductor device includes: first bit lines formed on a substrate; an insulating layer that is provided between the first bit lines and in a groove in the substrate, and has a higher upper face than the first bit lines; channel layers that are provided on both side faces of the insulating layer, and are coupled to the…

Hybrid hashing scheme for active HMMS

Granted: January 5, 2016
Patent Number: 9230548
Embodiments of the present invention include a data storage device and a method for storing data in a hash table. The data storage device can include a first memory device, a second memory device, and a processing device. The first memory device is configured to store one or more data elements. The second memory device is configured to store one or more status bits at one or more respective table indices. In addition, each of the table indices is mapped to a corresponding table index in…

Random scanning technique for secure transactions entered with capacitive sensor input device

Granted: January 5, 2016
Patent Number: 9229549
A random scanning technique for secure transactions entered with a capacitive sensor input device is described.

Stochastic signal density modulation for optical transducer control

Granted: December 29, 2015
Patent Number: 9226355
A current supply is coupled to a light source. The current supply is further coupled to a controller. The controller is configured to provide a stochastic control signal to the current supply, wherein the stochastic control signal controls a light intensity output of the light source.

Method of forming spaced-apart charge trapping stacks

Granted: December 29, 2015
Patent Number: 9224748
Methods are provided for fabricating memory devices. A method comprises fabricating charge-trapping stacks overlying a silicon substrate and forming bit line regions in the substrate between the charge trapping stacks. Insulating elements are formed overlying the bit line regions between the stacks. The charge-trapping stacks are etched to form two complementary charge storage nodes and to expose portions of the silicon substrate. Silicon is grown on the exposed silicon substrate by…

Semiconductor memory read and write access

Granted: December 29, 2015
Patent Number: 9224487
A semiconductor memory includes a sense amplifier which operates in response to activation of a sense amplifier enable signal and determines logic held in a nonvolatile memory cell according to a voltage of a bit line, the voltage varying with a cell current flowing through a real cell transistor, a replica cell transistor coupled in series between a first node and a ground line, and a timing generation unit. The timing generation unit activates the sense amplifier enable signal when the…

Multi-channel physical interfaces and methods for static random access memory devices

Granted: December 29, 2015
Patent Number: 9224454
An integrated circuit (IC) device can include a static random access memory (SRAM) section comprising a plurality of memory banks; and an interface comprising physical connections for more than eight memory channels, the connections for each memory channel including an address section including connections for SRAM control inputs and a complete address to access the memory banks, and a data section including data inputs and outputs (data IOs) to transfer data for one memory bank.

Histogram based pre-pruning scheme for active HMMS

Granted: December 29, 2015
Patent Number: 9224384
Embodiments of the present invention include an acoustic processing device, a method for acoustic signal processing, and a speech recognition system. The speech processing device can include a processing unit, a histogram pruning unit, and a pre-pruning unit. The processing unit is configured to calculate one or more Hidden Markov Model (HMM) pruning thresholds. The histogram pruning unit is configured to prune one or more HMM states to generate one or more active HMM states. The pruning…

Apparatus and method for programmable read preamble with training pattern

Granted: December 29, 2015
Patent Number: 9223726
A memory device is provided. The memory device includes a preamble memory and a memory controller. The preamble memory is arranged to store a read preamble such that the read preamble includes a training pattern that is suitable for aligning a capture point for read data. Further, the training pattern is programmable such that the training pattern can be altered at least once subsequent to manufacture of the preamble memory. In response to a read command, the memory controller provides…

Determining forces of contacts between styluses and objects

Granted: December 22, 2015
Patent Number: 9218073
An apparatus comprising a stylus with a dynamically switch tip shield is provided. The apparatus includes an elongated stylus housing having an end, a conductive tip disposed at least partially inside the stylus housing and extending from the end, a force sensor coupled to the conductive tip and configured to detect contact between the conductive tip and an object, a tip shield coupled with the stylus housing and extending from the end, and a switch coupled to the tip shield and the…