Determining forces of contacts between styluses and objects
Granted: December 22, 2015
Patent Number:
9218073
An apparatus comprising a stylus with a dynamically switch tip shield is provided. The apparatus includes an elongated stylus housing having an end, a conductive tip disposed at least partially inside the stylus housing and extending from the end, a force sensor coupled to the conductive tip and configured to detect contact between the conductive tip and an object, a tip shield coupled with the stylus housing and extending from the end, and a switch coupled to the tip shield and the…
Secure wireless communication
Granted: December 8, 2015
Patent Number:
9210571
A method in accordance with one embodiment of the invention may include receiving a first encryption key. A second encryption key may be generated, and a first data packet containing the second encryption key may be generated and at least part of the first data packet encrypted using the first encryption key. A second data packet may be generated and at least part of the second data packet encrypted using the second encryption key.
Memory gate landing pad made from dummy features
Granted: December 8, 2015
Patent Number:
9209197
Embodiments described herein generally relate to landing gate pads for contacts and manufacturing methods therefor. A bridge is formed between two features to allow a contact to be disposed, at least partially, on the bridge. Landing the contact on the bridge avoids additional manufacturing steps to create a target for a contact.
Method for manufacturing a contact for a semiconductor component and related structure
Granted: December 1, 2015
Patent Number:
9202758
A semiconductor component and a method for manufacturing the semiconductor component that are suitable for use with low temperature processing. A semiconductor substrate is provided and an optional layer of silicon nitride is formed on the semiconductor substrate using Atomic Layer Deposition (ALD). A layer of dielectric material is formed on the silicon nitride layer using Sub-Atmospheric Chemical Vapor Deposition (SACVD) at a temperature below about 450° C. When the optional layer of…
Optical navigation sensor and method
Granted: December 1, 2015
Patent Number:
9201511
Optical navigation sensors and methods are provided for use in an input device. In one embodiment, the input device comprises: (i) a button configured to in a first mode of operation of the input device receive user input when a surface of the button is pressed; (ii) an optical navigation sensor (ONS) configured to in a second mode of operation of the input device illuminate an object in proximity to the surface of the button and to sense and provide input related to motion of the…
Leakage reducing writeline charge protection circuit
Granted: November 24, 2015
Patent Number:
9196624
Methods and systems of fabricating a wordline protection structure are described. As described, the wordline protection structure includes a polysilicon structure formed adjacent to a memory core region. The polysilicon structure includes first doped region positioned on a core side of the polysilicon structure and a second doped region positioned on a spine side of the polysilicon structure. An un-doped region positioned between the first and second doped regions. A conductive layer is…
Method of chip positioning for multi-chip packaging
Granted: November 24, 2015
Patent Number:
9196608
Embodiments of the present invention include a method for multi-chip packaging. For example, the method includes positioning a first integrated circuit (IC) on a substrate package based on a first set of reference markers in physical contact with the substrate package and confirming an alignment of the first IC based on a second set of reference markers in physical contact with the substrate package. A second IC is stacked onto first IC based on the first set of reference markers. An…
Method of integrating a charge-trapping gate stack into a CMOS flow
Granted: November 24, 2015
Patent Number:
9196496
A method of fabricating a memory device is described. Generally, the method includes: forming on a surface of a substrate a dielectric stack including a tunneling dielectric and a charge-trapping layer overlying the tunneling dielectric; forming a cap layer overlying the dielectric stack, wherein the cap layer comprises a multi-layer cap layer including at least a first cap layer overlying the charge-trapping layer, and a second cap layer overlying the first cap layer; patterning the cap…
Semiconductor device and method of manufacturing the same
Granted: November 24, 2015
Patent Number:
9196495
A semiconductor device in accordance with one embodiment of the invention can include a semiconductor substrate having a groove, a bit line, a pocket implantation region, a bottom insulating membrane, and a charge accumulation region. The bit line is formed on a side of the groove in the semiconductor substrate and acts as a source and a drain. The pocket implantation region is formed to touch (or contact) the bit line, has a similar conductivity type as the semiconductor substrate, and…
Flash memory cell with flair gate
Granted: November 17, 2015
Patent Number:
9190531
An embodiment of the present invention is directed to a method of forming a memory cell. The method includes etching a trench in a substrate and filling the trench with an oxide to form a shallow trench isolation (STI) region. A portion of an active region of the substrate that comes in contact with the STI region forms a bitline-STI edge. The method further includes forming a gate structure over the active region of the substrate and over the STI region. The gate structure has a first…
Mixed wire bonding profile and pad-layout configurations in IC packaging processes for high-speed electronic devices
Granted: November 10, 2015
Patent Number:
9184151
A method and apparatus for mixed wire bonding and staggered bonding pad placement. A first plurality of bonding pads is arranged on a semiconductor device. A second plurality of bonding pads is also arranged on the semiconductor device. The bonding pads of the second plurality of bonding pads are arranged in a staggered pattern, such that the first and second pluralities of bonding pads form one of a plurality of double rows of bonding pads on the semiconductor device.
Adjusting apparatus and adjustment method
Granted: November 3, 2015
Patent Number:
9178416
An adjusting apparatus sets a designated value of a current source circuit to be a predetermined value, and causes discharging of a capacitor to end by switching a switch to a discharging side when the capacitor is not being charged by current output from a switching power source circuit. After the discharging of the capacitor ends and the designated value is set, the adjusting apparatus causes the capacitor to be charged by switching the switch to a charging side. The adjusting…
Methods circuits apparatuses and systems for providing current to a non-volatile memory array and non-volatile memory devices produced accordingly
Granted: November 3, 2015
Patent Number:
9177617
Disclosed are methods, circuits, apparatuses and systems for providing power to a dynamic load such as a non-volatile memory array. According to embodiments, a voltage source may be adapted to generate and output a supply current at substantially a target voltage through a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array. A discharge circuit branch coupled to an output terminal of the regulating…
Supply power dependent controllable write throughput for memory applications
Granted: November 3, 2015
Patent Number:
9177616
Devices and methods that allow dynamic management of throughput in a memory device based on a power supply voltage are provided. According to various embodiments, the power supply level can be monitored. Based on the result of the monitoring, an appropriate throughput can be determined. Once the appropriate throughput is determined, an appropriate control signal based on the determined throughput can be generated. The control signal can be configured to cause a bitline driver circuit in…
Low power capacitive sensor button
Granted: November 3, 2015
Patent Number:
9176636
A capacitance sensing module includes a timer circuit configured to generate a repetitive trigger signal, a low power oscillator block configured to generate a clock signal having a higher frequency than the repetitive trigger signal, a sensing block coupled with the timer circuit and the oscillator block and configured to, in response to the repetitive trigger signal, detect a presence of a conductive object at a capacitive sensor button by applying an excitation signal based on the…
Barrier region underlying source/drain regions for dual-bit memory devices
Granted: October 27, 2015
Patent Number:
9171936
One embodiment of the present invention relates to a memory cell. The memory cell comprises a substrate and a stacked gate structure disposed on the substrate, wherein the stacked gate structure comprises a charge trapping dielectric layer that is adapted to store at least one bit of data. The memory cell further includes a source and drain in the substrate, wherein the source and drain are disposed at opposite sides of the stacked gate structure. A barrier region is disposed…
Resistive changing memory cell architecture having a select transistor coupled to a resistance changing memory element
Granted: October 27, 2015
Patent Number:
9171612
A resistance changing memory array architecture includes an array of resistance changing memory unit cell arranged in rows and column, wherein at least two adjacent columns share a sense bit line, and a control line individually associated with each column, wherein a current control component within each unit cell along a respective column is coupled to a respective control line. The architecture further includes a plurality of word lines each associated with a respective row, wherein a…
Wireless locating and monitoring system
Granted: October 27, 2015
Patent Number:
9171470
A wireless tracking device including a positioning system for determining a location of the device and a processor connected to the positioning system. The wireless tracking device further including a wireless radio connected to the processor for transmitting the location of the device across a wireless area network. A vehicle monitoring system including a sensor, a microcontroller configured to receive a sensor input from the sensor and determine a vehicle condition data, and a wireless…
Force sensor baseline calibration
Granted: October 20, 2015
Patent Number:
9164605
An apparatus may include processing logic coupled with a force sensor input and a touch sensor input. The processing logic is configured to determine a relative force magnitude based on a force signal received at the force sensor input and a baseline measurement of the force sensor. The processing logic updates the baseline measurement in response to detecting that the touch signal indicates the absence of the one or more touches from the sensing surface.
Barrier electrode driven by an excitation signal
Granted: October 20, 2015
Patent Number:
9164640
Apparatuses and methods of driving barrier electrodes of a capacitive-sense array with an excitation signal are described. One apparatus includes a capacitance-sensing circuit coupled to a capacitive-sense array including multiple electrodes. The capacitance-sensing circuit includes multiple sensing channels. The capacitance-sensing circuit is operative to measure signals on a first subset of the multiple electrodes using the multiple sensing channels. Each of the sensing channels is…
