Fairchild Semiconductor Patent Applications

METHOD OF FORMING A FIELD EFFECT TRANSISTOR AND SCHOTTKY DIODE

Granted: June 21, 2012
Application Number: 20120156845
A method for forming a field effect transistor and Schottky diode includes forming a well region in a first portion of a silicon region where the field effect transistor is to be formed but not in a second portion of the silicon region where the Schottky diode is to be formed. Gate trenches are formed extending into the silicon region. A recessed gate is formed in each gate trench. A dielectric cap is formed over each recessed gate. Exposed surfaces of the well region are recessed to…

SEMICONDUCTOR DEVICES AND ELECTRICAL PARTS MANUFACTURING USING METAL COATED WIRES

Granted: June 14, 2012
Application Number: 20120146204
The device of this invention includes a semiconductor die attached to a bare copper lead frame and electrically coupled to a lead by a metal wire coated with a metallic material. The device would function similarly to devices where the lead frames were coated with other metallic materials, but at lower costs because instead of plating the lead frame the wire is plated. The wire can be either gold or aluminum. When the wire is gold, the coating may be silver or other suitable metallic…

HIGH-VOLTAGE SEMICONDUCTOR DEVICE WITH LATERAL SERIES CAPACITIVE STRUCTURE

Granted: June 14, 2012
Application Number: 20120146140
A semiconductor device includes a semiconductor substrate, a source region extending along a top surface of the semiconductor substrate, a drain region extending along the top surface of the semiconductor substrate, and a field shaping region disposed within the semiconductor substrate between the source region and the drain region. A cross-section of the semiconductor substrate extending from the source region to the drain region through the field shaping region includes an insulating…

LATERAL POWER DIODE WITH SELF-BIASING ELECTRODE

Granted: May 31, 2012
Application Number: 20120133016
A schottky diode includes a drift region of a first conductivity type and a lightly doped silicon region of the first conductivity type in the drift region. A conductor layer is over and in contact with the lightly doped silicon region to form a schottky contact with the lightly doped silicon region. A highly doped silicon region of the first conductivity type is in the drift region and is laterally spaced from the lightly doped silicon region such that upon biasing the schottky diode in…

WAFER LEVEL BUCK CONVERTER

Granted: April 26, 2012
Application Number: 20120100670
A buck converter module includes a high side (HS) die having source, drain, and gate bonding pads on a front side of the HS die, a low side (LS) die having a first section thereof with a plurality of through silicon vias (TSVs) extending from a back side to a front side of the LS die, the LS die having source, drain, and gate bonding pads located on a front side of a second section separate from the first section, the drain bonding pad electrically connected to the back side of the LS…

HYBRID-MODE LDMOS

Granted: April 19, 2012
Application Number: 20120094458
An MOS-bipolar hybrid-mode LDMOS device has a main gate input and a control gate input wherein the device operates in an MOS mode when both gate inputs are enabled, and operates in a bipolar mode when the main gate input is enabled and the control gate input is disabled. The device can drive the gate of a power MOSFET to deliver the high current required by the power MOSFET while in the bipolar mode, and provide a fully switching between supply voltage and ground to the gate of the power…

EMBEDDED DIE PACKAGE ON PACKAGE (POP) WITH PRE-MOLDED LEADFRAME

Granted: April 19, 2012
Application Number: 20120094436
A multiple-chip package has top and bottom pre-molded leadframes formed prior to the flip-chip attachment of semiconductor die to the leadframes. After die attachment, underfill is used to encase all but one surface of the die, and the top and bottom leadframes are joined together by solder bump balls with the exposed surfaces of the semiconductor dice proximate to each other.

SEMICONDUCTOR DEVICE WITH (110)-ORIENTED SILICON

Granted: April 12, 2012
Application Number: 20120086051
A vertical semiconductor device includes a bottom metal layer and a first P-type semiconductor layer overlying the bottom metal layer. The first P-type semiconductor layer is characterized by a surface crystal orientation of (110) and a first conductivity. The first P-type semiconductor layer is heavily doped. The vertical semiconductor device also includes a second P-type semiconductor layer overlying the first P-type semiconductor layer. The second semiconductor layer has a surface…

BUCK-BOOST REGULATOR WITH DEAD BAND

Granted: January 5, 2012
Application Number: 20120001610
This document provides methods and apparatus configured to efficiently regulate an output voltage near a desired voltage level, for example, under varying input or load conditions. An example apparatus can include a regulator having a boost controller configured to provide voltage to an output of the regulator when at least one of the output voltage or the input voltage is below a first threshold voltage and a buck controller configured to provide voltage to the output of the regulator…

SEMICONDUCTOR PACKAGE WITH AN EMBEDDED PRINTED CIRCUIT BOARD AND STACKED DIE

Granted: January 5, 2012
Application Number: 20120001313
A two tier power module has, in one form thereof, a PC board having upper and lower traces with an opening in the insulating material that contains a power device which has upward extending solder bump connections. An upper leadframe is mounted on the solder bumps and the upper tracks of the PC board. Vias in the PC board connect selected upper and lower traces. A control device is mounted atop the leadframe and wire bonded to the leadframe, and the assembly is encapsulated leaving…

LOW TEMPERATURE, LONG TERM ANNEALING OF NICKEL CONTACTS TO LOWER INTERFACIAL RESISTANCE

Granted: December 29, 2011
Application Number: 20110318920
A method of annealing semiconductor devices to form substantially ohmic contact regions between a layer of wide band-gap semiconductor material and contact areas disposed thereon includes exposing the semiconductor devices to an annealing temperature less than approximately 900 degrees Celsius for an annealing duration of greater than approximately two hours.

SHIELDED LEVEL SHIFT TRANSISTOR

Granted: December 29, 2011
Application Number: 20110316078
A semiconductor device can include a transistor and an isolation region. The transistor is formed in a semiconductor substrate having a first conductivity type. The transistor includes a drift region extending from a drain region toward a source region and having a second conductivity type. The drift region includes a first resurf region near a working top surface and having the first conductivity type. The high voltage isolation island region includes a first well region laterally…

MOTOR ROTOR AND A MOTOR HAVING THE SAME

Granted: December 22, 2011
Application Number: 20110309705
A motor rotor includes an annular body and a plurality of magnetic bodies installed on an inner lateral surface of the annular body in an irregular manner, to prevent a rotating motor from generating a cogging effect, disperse the frequency of the cogging torque, and reduce the amplitude. Accordingly, noises generated while the motor is operating are reduced, the periodicity of a cogging torque is changed, and cogging torque is reduced.

AUDIO AMPLIFIER PERFORMANCE WHILE MAINTAINING USB COMPLIANCE AND POWER DOWN PROTECTION

Granted: December 1, 2011
Application Number: 20110293100
An apparatus comprises a first audio amplifier circuit configured to provide an analog audio signal and an analog switch circuit including a first input configured to receive the analog audio signal, a second input configured to receive a first digital data signal, and a first output configured to provide one of the digital data signal or the analog audio signal. The apparatus also includes a first feedback circuit coupled to the first audio amplifier circuit and the analog switch…

FIELD EFFECT TRANSISTOR WITH TRENCH FILLED WITH INSULATING MATERIAL AND STRIPS OF SEMI-INSULATING MATERIAL ALONG TRENCH SIDEWALLS

Granted: November 24, 2011
Application Number: 20110284955
In accordance with an embodiment of the present invention, a MOSFET includes a first semiconductor region having a first surface, a first insulation-filled trench region extending from the first surface into the first semiconductor region, and strips of semi-insulating material along the sidewalls of the first insulation-filled trench region. The strips of semi-insulating material may be insulated from the first semiconductor region.

SHIELD CONTACTS IN A SHIELDED GATE MOSFET

Granted: November 10, 2011
Application Number: 20110275208
A semiconductor structure is formed as follows. Trenches are formed in a semiconductor region and a shield electrode is formed in each trench. Gate electrodes are formed in a portion of the trenches that form an active region. Each gate electrode is disposed over the shield electrode and is isolated from the shield electrode by an inter-electrode dielectric. An interconnect layer is formed extending over the trenches. The interconnect layer is isolated from the gate electrodes in the…

CHARGE PUMP SWITCH POWER DOWN PROTECTION

Granted: October 20, 2011
Application Number: 20110255203
This application discusses, among other things, switch circuit apparatus having power down protection and not requiring power up sequencing. An apparatus embodiment can include a first supply node coupled to a first input of a level shifting circuit via a protection circuit, a second supply node coupled to a second input of the level shifting circuit via a single pull-up transistor, and a switch including a control input, a first node, and a second node controllably isolated from the…

CONTROL PIN POWERED ANALOG SWITCH

Granted: August 25, 2011
Application Number: 20110204955
An apparatus comprises at least one input connection, at least one output connection, and at least one control connection, and at least one switch circuit coupled to the input, the output, and the control connections. The switch circuit passes a signal received at the input to the output when the switch circuit is activated by a control signal received at the control connection. Power to the switch circuit is provided via the control connection.

Fully Featured Control Pin Powered Analog Switch

Granted: August 25, 2011
Application Number: 20110204960
An apparatus comprises at least one input connection, at least one output connection, at least one control connection, a voltage converter circuit having an input coupled to the control connection and an output, wherein the voltage converter circuit is configured to provide a voltage at its output that is greater than a voltage present at its input, and at least one switch circuit coupled to the input connection, the output connection, and the output of the voltage converter circuit. The…

MULTIPLE DETECTION CIRCUIT FOR ACCESSORY JACKS

Granted: August 18, 2011
Application Number: 20110199123
This document discusses, among other things, a multiple accessory detection apparatus and methods for identifying accessories coupled to a multi-pin connector of an electronic device. The apparatus can include a first reference generator, a second reference generator, a plurality of switches to couple an output of the second generator to an accessory device and a comparator. The comparator can generate identifying information about the accessory device using the reference information…