Method Of Assembling And Testing An Electronics Module
Granted: August 23, 2007
Application Number:
20070194779
An electronics module is assembled by demountably attaching integrated circuits to a module substrate. The module is then tested at a particular operating speed. If the module fails to operate correctly at the tested speed, the integrated circuit or circuits that caused the failure are removed and replaced with new integrated circuits, and the module is retested. Once it is determined that the module operates correctly at the tested speed, the module may be rated to operate at the tested…
A PROBE ARRAY STRUCTURE AND A METHOD OF MAKING A PROBE ARRAY STRUCTURE
Granted: July 5, 2007
Application Number:
20070152685
Probe array structures and methods of making probe array structures are disclosed. A plurality of electrically conductive elongate contact structures disposed on a first substrate can be provided. The contact structures can then be partially encased in a securing material such that ends of the contact structures extend from a surface of the securing material. The exposed portions of the contact structures can then be captured in a second substrate.
PROBING APPARATUS WITH GUARDED SIGNAL TRACES
Granted: June 21, 2007
Application Number:
20070139061
A probing apparatus can comprise a substrate, conductive signal traces, probes, and electromagnetic shielding. The substrate can have a first surface and a second surface opposite the first surface, and the electrically conductive first signal traces can be disposed on the first surface of the first substrate. The probes can be attached to the first signal traces, and the electromagnetic shielding structures can be disposed about the signal traces.
THREE DIMENSIONAL MICROSTRUCTURES AND METHODS FOR MAKING THREE DIMENSIONAL MICROSTRUCTURES
Granted: June 21, 2007
Application Number:
20070141743
Systems and methods for depositing a plurality of droplets in a three-dimensional array are disclosed. The array can comprise a first type of droplets disposed to form a support structure and a second type of droplets forming a conductive seed layer on the support structure. A structure material can be electrodeposited onto the seed layer to create a three-dimensional structure.
Apparatus And Method For Adjusting An Orientation Of Probes
Granted: June 7, 2007
Application Number:
20070126435
Probes of a probe card assembly can be adjusted with respect to an element of the probe card assembly, which can be an element of the probe card assembly that facilitates mounting of the probe card assembly to a test apparatus. The probe card assembly can then be mounted in a test apparatus, and an orientation of the probe card assembly can be adjusted with respect to the test apparatus, such as a structural part of the test apparatus or a structural element attached to the test…
Probe Card Assembly With A Mechanically Decoupled Wiring Substrate
Granted: June 7, 2007
Application Number:
20070126440
A probe card assembly can comprise a probe head assembly and a wiring substrate. The probe head assembly can comprise a plurality of probes disposed to contact an electronic device disposed on a holder in a test housing. The wiring substrate can include an electrical interface to a test controller and a plurality of electrical wiring composing electrical paths between the electrical interface and ones of the probes, and the wiring substrate can comprise a first portion on which the…
Probe Card Assembly With An Interchangeable Probe Insert
Granted: January 11, 2007
Application Number:
20070007977
A probe card assembly can include an insert holder configured to hold a probe insert, which can include probes disposed in a particular configuration for probing a device to be tested. The probe card assembly can provide an electrical interface to a tester that can control testing of the device, and while attached to the probe card assembly, the insert holder can hold the probe insert such that the probe insert is electrically connected to electrical paths within the probe card assembly…
Method of designing an application specific probe card test system
Granted: December 7, 2006
Application Number:
20060273809
A method is provided for design and programming of a probe card with an on-board programmable controller in a wafer test system. Consideration of introduction of the programmable controller is included in a CAD wafer layout and probe card design process. The CAD design is further loaded into the programmable controller, such as an FPGA to program it: (1) to control direction of signals to particular ICs, even during the test process (2) to generate test vector signals to provide to the…
Electronic package with direct cooling of active electronic components
Granted: December 7, 2006
Application Number:
20060274501
A cooling assembly includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components. A coolant port allows a coolant to enter the package and directly cool the active electronic components of the dies.
Apparatus And Method For Managing Thermally Induced Motion Of A Probe Card Assembly
Granted: November 16, 2006
Application Number:
20060255814
A probe card assembly can include a probe head assembly having probes for contacting an electronic device to be tested. The probe head assembly can be electrically connected to a wiring substrate and mechanically attached to a stiffener plate. The wiring substrate can provide electrical connections to a testing apparatus, and the stiffener plate can provide structure for attaching the probe card assembly to the testing apparatus. The stiffener plate can have a greater mechanical strength…
Active diagnostic interface for wafer probe applications
Granted: September 28, 2006
Application Number:
20060214679
A diagnostic interface on a wafer probe card is provided to enable monitoring of test signals provided between the test system controller and one or more DUTs on a wafer during wafer testing. To prevent distortion of test signals on the channel lines, in one embodiment buffers are provided on the probe card as part of the diagnostic interface connecting to the channels. In another embodiment, an interface adapter pod is provided that connects to the diagnostic interface on the probe card…
Method of estimating channel bandwidth from a time domain reflectometer (TDR) measurement
Granted: August 3, 2006
Application Number:
20060170431
Bandwidth of a test channel is determined from a single port Time Domain Reflectometer (TDR) measurement with the channel terminated in a short or an open circuit. Bandwidth is estimated by: (1) making a TDR measurement of a channel terminated in a short or open circuit; (2) determining a maximum slope of the reflection from the TDR measurement; (2) calculating an interpolated rise or fall time, for example by taking 80% of the applied voltage between the 10% and 90% points, and then…
Method And Apparatus For Verifying Planarity In A Probing System
Granted: August 3, 2006
Application Number:
20060170434
An apparatus for determining a planarity of a first structure configured to hold a probing device to the planarity of a second structure configured to hold a device to be probed is disclosed. In one example of the apparatus, a plurality of moveable push rods are disposed in a substrate, which is attached to the first structure. In initial non-displaced positions, the push rods correspond to a planarity of the first structure. The second structure is then brought into contact with the…
Programmable devices to route signals on probe cards
Granted: August 3, 2006
Application Number:
20060170435
A probe card of a wafer test system includes one or more programmable ICs, such as FPGAs, to provide routing from individual test signal channels to one of multiple probes. The programmable ICs can be placed on a base PCB of the probe card, or on a daughtercard attached to the probe card. With programmability, the PCB can be used to switch limited test system channels away from unused probes. Programmability further enables a single probe card to more effectively test devices having the…
Bi-directional buffer for interfacing test system channel
Granted: June 22, 2006
Application Number:
20060132158
An emitter follower or source follower transistor is provided in the channel of a wafer test system between a DUT and a test system controller to enable a low power DUT to drive a test system channel. A bypass resistor is included between the base and emitter of the emitter follower transistor to enable bidirectional signals to be provided between the DUT channel and test system controller, as well as to enable parametric tests to be performed. The emitter follower transistor and bypass…
Remote Test Facility With Wireless Interface To Local Test Facilities
Granted: June 22, 2006
Application Number:
20060132161
A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices…
Electroform spring built on mandrel transferable to other surface
Granted: April 27, 2006
Application Number:
20060085976
Resilient spring contact structures are manufactured by plating the contact structures on a reusable mandrel, as opposed to forming the contact structures on sacrificial layers that are later etched away. In one embodiment, the mandrel includes a form or mold area that is inserted through a plated through hole in a substrate. Plating is then performed to create the spring contact on the mold area of the mandrel as well as to attach the spring contact to the substrate. In a second…
Stacked Die Module
Granted: April 13, 2006
Application Number:
20060076690
Semiconductor dies are stacked offset from one another so that terminals located along two edges of each die are exposed. The two edges of the dies having terminals may be oriented in the same direction. Electrical connections may connect terminals on one die with terminals on another die, and the stack may be disposed on a wiring substrate to which the terminals of the dies may be electrically connected.
Method and apparatus for remotely buffering test channels
Granted: March 9, 2006
Application Number:
20060049820
A system is provided to enable leakage current measurement or parametric tests to be performed with an isolation buffer provided in a channel line. Multiple such isolation buffers are used to connect a single signal channel to multiple lines. Leakage current measurement is provided by providing a buffer bypass element, such as a resistor or transmission gate, between the input and output of each buffer. The buffer bypass element can be used to calibrate buffer delay out of the test…
Method to build a wirebond probe card in a many at a time fashion
Granted: February 23, 2006
Application Number:
20060040417
Resilient spring contacts for use in wafer test probing are provided that can be manufactured with a very fine pitch spacing and precisely located on a support substrate. The resilient contact structures are adapted for wire bonding to an electrical circuit on a space transformer substrate. The support substrates with attached spring contacts can be manufactured together in large numbers and diced up and tested before attachment to a space transformer substrate to improve yield. The…
