Formfactor Patent Grants

Method of incorporating interconnect systems into an integrated circuit process flow

Granted: August 14, 2007
Patent Number: 7257796
A method for designing integrated circuits (ICs) and their interconnect systems includes IC component cells and interconnect component cells in a cell library. Each IC component cell provides both a physical and behavioral model of a component that may be incorporated into the IC while each interconnect component cell includes both a physical and behavioral model of a separate internal or external component of an interconnect system that may link the IC to external nodes. Both the IC and…

Method to build robust mechanical structures on substrate surfaces

Granted: August 7, 2007
Patent Number: 7251884
A robust mechanical structure is provided to prevent small foundation structures formed on a substrate from detaching from the substrate surface. The strengthened structure is formed by plating a foundation metal layer on a seed layer and then embedding the plated foundation structure in an adhesive polymer material, such as epoxy. Components, such as spring probes, can then be constructed on the plated foundation. The adhesive polymer material better assures the adhesion of the metal…

Remote test facility with wireless interface to local test facilities

Granted: August 7, 2007
Patent Number: 7253651
A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices…

Predictive, adaptive power supply for an integrated circuit under test

Granted: July 17, 2007
Patent Number: 7245120
A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the…

Probe card assembly including a programmable device to selectively route signals from channels of a test system controller to probes

Granted: July 17, 2007
Patent Number: 7245134
A probe card of a wafer test system includes one or more programmable ICs, such as FPGAs, to provide routing from individual test signal channels to one of multiple probes. The programmable ICs can be placed on a base PCB of the probe card, or on a daughtercard attached to the probe card. With programmability, the PCB can be used to switch limited test system channels away from unused probes. Programmability further enables a single probe card to more effectively test devices having the…

Test head assembly having paired contact structures

Granted: July 17, 2007
Patent Number: 7245137
A test head assembly can include a probe card, which can include first contact areas. The test head assembly can also include a contactor, which can include second contact areas. An interposer can include first spring contact structures and second spring contact structures. The first spring contact structures can contact one of the first contact areas, and the second spring contact structures can contact one of the second contact areas. Ones of the first spring contact structures can be…

Tester channel to multiple IC terminals

Granted: July 17, 2007
Patent Number: 7245139
A probe card provides signal paths between integrated circuit (IC) tester channels and probes accessing input and output pads of ICs to be tested. When a single tester channel is to access multiple (N) IC pads, the probe card provides a branching path linking the channel to each of the N IC input pads. Each branch of the test signal distribution path includes a resistor for isolating the IC input pad accessed via that branch from all other branches of the path so that a fault on that IC…

Method and apparatus for calibrating communications channels

Granted: July 3, 2007
Patent Number: 7239971
A periodic signal is driven onto a transmission line, and the frequency of the periodic signal is varied from an initial frequency that corresponds to a quarter wave or half wave of an estimated length of the transmission line. A null or a peak in the envelope of the voltage or current wave induced on the transmission line by the periodic signal is detected at or near the end of the transmission line onto which the signal is driven. The frequency of the periodic signal that caused the…

Adjustable delay transmission line

Granted: July 3, 2007
Patent Number: 7239220
A transmission line includes a signal conductor and at least one varactor diode capacitively coupled to the signal conductor. The transmission line's signal path delay is a function of its shunt capacitance, and the varactor's capacitance forms a part of the transmission line's shunt capacitance. The transmission line's signal path delay is adjusted by adjusting a control voltage across the varactor diode thereby to adjust the varactor diode's capacitance.

Method and apparatus for verifying planarity in a probing system

Granted: July 3, 2007
Patent Number: 7239159
An apparatus for determining a planarity of a first structure configured to hold a probing device to the planarity of a second structure configured to hold a device to be probed is disclosed. In one example of the apparatus, a plurality of moveable push rods are disposed in a substrate, which is attached to the first structure. In initial non-displaced positions, the push rods correspond to a planarity of the first structure. The second structure is then brought into contact with the…

Photoresist formulation for high aspect ratio plating

Granted: July 3, 2007
Patent Number: 7238464
SU-8 photoresist compositions are modified to improve their adhesion properties by adding 1% to 6% of an adhesion promoter selected from the group consisting of glycidoxypropanetrimethoxysilane, mercaptopropyltrimethoxysilane, and aminopropyltrimethoxysilane. SU-8 photoresist compositions are modified to improve their resistance to cracking and film stress by adding 0.5% to 3% of a plasticizer selected from the group consisting of dialkylphthalates, dialkylmalonates, dialkylsebacates,…

Mechanically reconfigurable vertical tester interface for IC probing

Granted: June 12, 2007
Patent Number: 7230437
A wafer test assembly includes multiple probe head substrates arranged like tiles with connectors attached to one side and probes supported on the opposing side. In one embodiment, flexible cable connectors directly connect the connectors on the probe head tile to a test head, while in another embodiment the flexible cables connect the probe head tile to a PCB providing horizontal routing to test head connectors. In one embodiment, leveling pins provide a simplified support structure…

Resilient contact structures formed and then attached to a substrate

Granted: June 5, 2007
Patent Number: 7225538
Contact structures exhibiting resilience or compliance are formed. The contact structures may be formed on a sacrificial substrate. The contact structures are attached to an array of electrical connections on a substrate to form a contact assembly. The electrical connections on the substrate may be metallic pads.

High performance probe system

Granted: June 5, 2007
Patent Number: 7227371
A probe system for providing signal paths between an integrated circuit (IC) tester and input/output, power and ground pads on the surfaces of ICs to be tested includes a probe board assembly, a flex cable and a set of probes arranged to contact the IC's I/O pads. The probe board assembly includes one or more rigid substrate layers with traces and vias formed on or within the substrate layers providing relatively low bandwidth signal paths linking the tester to probes accessing some of…

Method for processing an integrated circuit

Granted: May 15, 2007
Patent Number: 7217580
Methods for processing at least one die which comprises an integrated circuit. In one example of a method of the invention, an identification code is applied to a carrier. A singulated die is deposited into the carrier which holds the singulated die. The singulated die comprises an integrated circuit. The identification code may be applied to the carrier before or after depositing the singulated die into the carrier. The carrier may be used in testing the singulated die and may include a…

Wireless test system

Granted: May 15, 2007
Patent Number: 7218094
One or more testers wirelessly communicate with one or more test stations. The wireless communication may include transmission of test commands and/or test vectors to a test station, resulting in testing of one or more electronic devices at the test station. The wireless communication may also include transmission of test results to a tester. Messages may also be wirelessly exchanged.

Method and apparatus for probing an electronic device in which movement of probes and/or the electronic device includes a lateral component

Granted: May 15, 2007
Patent Number: 7218127
An electronic device is moved into a first position such that terminals of the electronic device are adjacent probes for making electrical contact with the terminals. The electronic device is then moved horizontally or diagonally such that the terminals contact the probes. Test data are then communicated to and from the electronic device through the probes.

Segmented contactor

Granted: May 8, 2007
Patent Number: 7215131
A method of fabricating a large area, multi-element contactor. A segmented contactor is provided for testing semiconductor devices on a wafer that comprises a plurality of contactor units mounted to a substrate. The contactor units are formed, tested, and assembled to a backing substrate. The contactor units may include leads extending laterally for connection to an external instrument such as a burn-in board. The contactor units include conductive areas such as pads that are placed into…

Apparatuses and methods for cleaning test probes

Granted: May 1, 2007
Patent Number: 7211155
Apparatuses and methods for cleaning test probes used in a semiconductor testing machine of the type having a plurality of test probes configured to contact the surface of a semiconductor wafer to test one or more dies formed thereon. In one embodiment, the apparatus includes a roller-support arm and a cylindrical roller supported by the roller-support arm. The roller has an outer surface comprising a sticky material. Debris on the probes will adhere to the sticky material as roller is…

Method of making an electronics module

Granted: April 17, 2007
Patent Number: 7204008
An electronics module is assembled by demountably attaching integrated circuits to a module substrate. The module is then tested at a particular operating speed. If the module fails to operate correctly at the tested speed, the integrated circuit or circuits that caused the failure are removed and replaced with new integrated circuits, and the module is retested. Once it is determined that the module operates correctly at the tested speed, the module may be rated to operate at the tested…