Interconnect for microelectronic structures with enhanced spring characteristics
Granted: December 7, 2004
Patent Number:
6827584
An interconnection element and a method of forming an interconnection element. In one embodiment, the interconnection element includes a first structure and a second structure coupled to the first structure. The second structure coupled with the first material has a spring constant greater than the spring constant of the first structure alone. In one embodiment, the interconnection element is adapted to be coupled to an electronic component tracked as a conductive path from the…
Test assembly including a test die for testing a semiconductor product die
Granted: November 30, 2004
Patent Number:
6825052
One embodiment of the present invention concerns a test assembly for testing product circuitry of a product die. In one embodiment, the test assembly includes at test die and an interconnection substrate for electrically coupling the test die to a host controller that communicates with the test die. The test die may be designed according to a design methodology that includes the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry…
Interconnection element with contact blade
Granted: November 30, 2004
Patent Number:
6825422
An apparatus and method providing improved interconnection elements and tip structures for effecting pressure connections between terminals of electronic components is described. The tip structure of the present invention has a sharpened blade oriented on the upper surface of the tip structure such that the length of the blade is substantially parallel to the direction of horizontal movement of the tip structure as the tip structure deflects across the terminal of an electronic…
Integrated circuit interconnect system
Granted: November 23, 2004
Patent Number:
6822529
In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC.…
Apparatuses and methods for cleaning test probes
Granted: November 16, 2004
Patent Number:
6817052
Apparatuses and methods for cleaning test probes used in a semiconductor testing machine of the type having a plurality of test probes configured to contact the surface of a semiconductor wafer to test one or more dies formed thereon. In one embodiment, the apparatus includes a roller-support arm and a cylindrical roller supported by the roller-support arm. The roller has an outer surface comprising a sticky material. Debris on the probes will adhere to the sticky material as roller is…
Method for manufacturing raised electrical contact pattern of controlled geometry
Granted: November 16, 2004
Patent Number:
6818840
Spring contact elements are attached to terminals of an electronic component, which may be a semiconductor die. The spring contact elements may comprise a flexible precursor element. The precursor element may be over coated with a resilient material. The spring contact elements may be elongate and attached to the terminals at one end. The other end of the spring contacts may be spaced away from the electronic component.
Adjustable delay transmission line
Granted: November 9, 2004
Patent Number:
6816031
A transmission line includes a signal conductor and at least one varactor diode capacitively coupled to the signal conductor. The transmission line's signal path delay is a function of its shunt capacitance, and the varactor's capacitance forms a part of the transmission line's shunt capacitance. The transmission line's signal path delay is adjusted by adjusting a control voltage across the varactor diode thereby to adjust the varactor diode's capacitance.
Microelectronic spring with additional protruding member
Granted: November 2, 2004
Patent Number:
6811406
Various structural features for modifying the performance characteristic of cantilevered microelectronic spring structures are disclosed. Generally, the features comprise a protruding member mounted between a supporting substrate and the transverse cantilever beam of a microelectronic spring structure, at a distance spaced apart from the supporting structure from which the beam is cantilevered. The protruding member may be equal to the clearance under the beam, less than the clearance…
Compensation for test signal degradation due to DUT fault
Granted: November 2, 2004
Patent Number:
6812691
An electronic device tester channel transmits a single test signal to multiple terminals of electronic devices under test (DUTs) through a set of isolation resistors. The tester channel employs feedback to automatically adjust the test signal voltage to compensate for affects of faults at any of the DUT terminals to prevent the faults from substantially affecting the test signal voltage.
Microelectronic contact structures, and methods of making same
Granted: October 26, 2004
Patent Number:
6807734
Microelectronic contact structures are fabricated by separately forming, then joining together, various components thereof. Each contact structure has three components: a “post” component, a “beam” component, and a “tip” component. The resulting contact structure, mounted to an electronic component, is useful for making an electrical connection with another electronic component. The post component can be fabricated on a sacrificial substrate, joined to…
Tester channel to multiple IC terminals
Granted: September 28, 2004
Patent Number:
6798225
A probe card provides signal paths between integrated circuit (IC) tester channels and probes accessing input and output pads of ICs to be tested. When a single tester channel is to access multiple (N) IC pads, the probe card provides a branching path linking the channel to each of the N IC input pads. Each branch of the test signal distribution path includes a resistor for isolating the IC input pad accessed via that branch from all other branches of the path so that a fault on that IC…
Lithographic contact elements
Granted: September 14, 2004
Patent Number:
6791176
A method of forming an interconnection, including a spring contact element, by lithographic techniques. In one embodiment, the method includes applying a masking material over a first portion of a substrate, the masking material having an opening which will define a first portion of a spring structure, depositing a structure material (e.g., conductive material) in the opening, and overfilling the opening with the structure material, removing a portion of the structure material, and…
Wafer-level burn-in and test
Granted: September 7, 2004
Patent Number:
6788094
Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or incorporated therein, metallic spring contact elements effecting interconnections between the ASICs and a plurality of devices-under-test (DUTs) on a wafer-under-test (WUT), all disposed in a vacuum vessel so that the ASICs can be operated at temperatures independent from and significantly…
Test signal distribution system for IC tester
Granted: August 31, 2004
Patent Number:
6784674
A probe board provides signal paths between an integrated circuit (IC) tester and probes accessing terminals on the surfaces of ICs formed on a semiconductor wafer for receiving test signals form the IC tester. A branching signal path within the probe board distributes a test signal produced by one channel of the IC tester to several probes. Resistors within the branching signal path resistively isolate the probes from one another so that a fault occurring at any one IC terminal will not…
Closed-grid bus architecture for wafer interconnect structure
Granted: August 31, 2004
Patent Number:
6784677
An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first…
Forming tool for forming a contoured microelectronic spring mold
Granted: August 24, 2004
Patent Number:
6780001
A forming tool with one or more embossing tooth, and preferably, a plurality of such embossing teeth, arranged on a substantially planar substrate, is disclosed. Each embossing tooth is configured for forming a sacrificial layer to provide a contoured surface for forming a microelectronic spring structure. Each embossing tooth has a protruding area corresponding to a base of a microelectronic spring, and a sloped portion corresponding to a beam contour of a microelectronic spring.…
Microelectronic spring contact repair
Granted: August 17, 2004
Patent Number:
6777319
A method for replacing a microelectronic spring contact bonded to a terminal of a substrate is disclosed. The method includes removing the microelectronic spring contact from the terminal, such as by cutting the microelectronic spring contact in two adjacent to the terminal. Then, a bonding material, such as a solder paste, is applied to the terminal and a replacement spring contact is positioned on the bonding material. The bonding material is then cured to fix the replacement spring…
Resilient contact structures for interconnecting electronic devices
Granted: August 17, 2004
Patent Number:
6778406
Resilient contact structures provide electrical interconnection between a semiconductor die and another electronic component. Multilayered packaging may be formed on the semiconductor die, and the resilient contact structures may be formed on portions of one or more of the layers. Heat dissipating structures may be provided on the die.
Method of assembling and testing an electronics module
Granted: July 20, 2004
Patent Number:
6764869
An electronics module is assembled by demountably attaching integrated circuits to a module substrate. The module is then tested at a particular operating speed. If the module fails to operate correctly at the tested speed, the integrated circuit or circuits that caused the failure are removed and replaced with new integrated circuits, and the module is retested. Once it is determined that the module operates correctly at the tested speed, the module may be rated to operate at the tested…
Fan out of interconnect elements attached to semiconductor wafer
Granted: July 6, 2004
Patent Number:
6759311
An unsingulated semiconductor wafer is provided. Electrical interconnect elements are formed on the unsingulated wafer such that the interconnect elements are electrically connected to terminals of the semiconductor dice composing the wafer. At least a portion of the interconnect elements extend beyond the boundaries of the dice into the scribe streets separating the individual dice. Thereafter, the wafer is singulated into individual dice.
