GSI Technology Patent Grants

One by one selection of items of a set

Granted: January 28, 2025
Patent Number: 12210539
A method for selecting items one by one from a set of items elected from a large dataset of items includes determining whether or not a density of the set is sparse. If the density is sparse, the method includes repeatedly performing an extreme item select (EIS) method to select a next one of the elected items from the set and removing the next one from the set to create a next set. If the density is not sparse, the method includes performing a next index select (NIS) method to create a…

Reference distance similarity search

Granted: January 28, 2025
Patent Number: 12210537
A similarity search system includes a database of original vectors, a hierarchical database of bins and a similarity searcher. The hierarchical database of bins is stored in an associative memory array, each bin identified by an order vector representing at least one original vector and the dimension of the order vector is smaller than the dimension of the original vector. The similarity searcher searches in the database for at least one similar bin whose order vector resembles an order…

Method to compare between a first number and a second number

Granted: December 3, 2024
Patent Number: 12159123
A method to compare between a first number and a second number includes the steps of storing the first number in a first row of an associative memory array, storing a two's complement representation of the second number in a second row of the associative memory array wherein bit i of the second number is stored in a same column of the associative memory array as bit i of the first number, concurrently performing a carry save operation on a plurality of columns of the associative memory…

Efficient similarity search

Granted: November 5, 2024
Patent Number: 12135725
A system for measuring similarity between a binary query vector and a plurality of binary candidate vectors includes a storage unit and a processor. The storage unit stores the binary query vector and the plurality of candidate vectors, and the processor performs Tanimoto calculations in terms of Hamming distances.

Global responder signal circuitry for memory arrays

Granted: October 29, 2024
Patent Number: 12131779
A memory device includes a plurality of memory units and a global responder (RSP) unit. Each memory unit includes a memory array of memory cells arranged in rows and columns, and an RSP unit. The memory array receives horizontal input data rotated for storage as data candidates in columns of the array. At least one of the rows is a calculation row receiving per-bit-line Boolean AND operations between bits of a marker row and bits of a row of data of the data candidates. The RSP unit…

Square root calculations on an associative processing unit

Granted: October 1, 2024
Patent Number: 12106071
A method for calculating a square root B having N bits of a number X having 2N bits includes iterating on bits bi of square root B starting from the most significant bit until the least significant bit of square root B. For each iteration, the method includes locating a 1 at the squared location of bit bi in a CHECK variable, determining the value of bit bi from the result of a comparison of number X with a function of all previously found bits and a previous comparison outcome, shifting…

System and method for random data distribution in a memory array

Granted: September 3, 2024
Patent Number: 12079478
A method for random data distribution in a memory array from a source row to a destination row includes receiving a plurality of pairs of addresses, where each pair includes a source address of a source cell in the source row and a destination addresses of a destination cell in a destination row, storing the source address in cells of a column associated with the destination cell, creating a Boolean algebra expression defining a correlation between each one of the source addresses and a…

Integrating a memory layer in a neural network for one-shot learning

Granted: August 27, 2024
Patent Number: 12073328
A method for machine learning includes extracting features from a training set of inputs, wherein each input generates a feature set and each the feature set forms a neural network key. The method includes arranging the keys in an in-memory computational layer such that the distance between any pair of keys corresponding to similar inputs is as close as possible while keys for a pair of dissimilar inputs have differing values as far apart as possible, wherein each of the keys has a fixed…

Iterative binary division with carry prediction

Granted: July 30, 2024
Patent Number: 12050885
A method for binary division includes the steps of having a current remainder provided as a sum bit-vector and a carry bit-vector, performing a carry save add operation between the sum bit-vector and the carry bit-vector and a two's complement representation of a denominator to produce a temporary sum and a temporary carry, predicting a sign bit of a full total of the temporary sum and the temporary carry and updating the remainder with the temporary sum and the temporary carry and…

Functional protein classification for pandemic research

Granted: July 2, 2024
Patent Number: 12027238
A protein searcher includes a pre-trained CNN, a feature extractor, a database and a KNN searcher. The pre-trained CNN, trained on a previously classified amino acid database, receives an unidentified amino acid sequence. The feature extractor extracts a feature vector of the unidentified amino acid sequence as a query feature vector. The database stores feature vectors of trained amino acid sequences and of at least one untrained amino acid sequence and stores associated classes of the…

In memory matrix multiplication and its usage in neural networks

Granted: June 11, 2024
Patent Number: 12008068
A device for in memory vector-matrix multiplication includes a memory array and in-memory logic. The memory array has at least two sections and stores a multiplier matrix. The memory array also receives and stores an input multiplicand arranged in a vector such that the operands of the vector-matrix multiplication are located on a same column of the memory array. Each of the sections is one of: a volatile memory array, a non-volatile memory array, a destructive memory array and a…

Associative hash tree

Granted: May 21, 2024
Patent Number: 11991290
A system to dynamically calculate a root hash value from a plurality of leaf hash values includes a flat associative memory and a hash parser. The flat associative memory stores a plurality of leaf hash values. The hash parser extracts a compressed number of branch nodes from the plurality of leaf hash values, determines branch node relationships from the plurality of leaf hash values, and saves the compressed number of branch nodes, and the branch node relationships.

In-memory efficient multistep search

Granted: May 21, 2024
Patent Number: 11989185
A cascading search system includes an associative memory array, a similarity match processor and an exact match processor. The columns of the array store a plurality of multiportion data vectors and have a first section, for a first portion of a vector, a second section for storing a second portion of a vector and a match row. The similarity match processor performs a parallel similarity search of a similarity query in the first sections and stores a match bit indication in the match row…

Pipeline architecture for bitwise multiplier-accumulator (MAC)

Granted: March 26, 2024
Patent Number: 11941407
A unit for accumulating a plurality N of multiplied M bit values includes a receiving unit, a bit-wise multiplier and a bit-wise accumulator. The receiving unit receives a pipeline of multiplicands A and B such that, at each cycle, a new set of multiplicands is received. The bit-wise multiplier bit-wise multiplies bits of a current multiplicand A with bits of a current multiplicand B and to sum and carry between bit-wise multipliers. The bit-wise accumulator accumulates output of the…

One by one selection of items of a set

Granted: January 2, 2024
Patent Number: 11860885
An associative memory array includes a plurality of associative memory cells arranged in rows and columns where each first cell in a first row and in a first column has access to a content of a second cell in a second row in an adjacent column.

Computational memory cell and processing array device using the memory cells for XOR and XNOR computations

Granted: September 19, 2023
Patent Number: 11763881
A memory cell and processing array that has a plurality of memory are capable of performing logic functions, including an exclusive OR (XOR) or an exclusive NOR (XNOR) logic function. The memory cell may have a read port in which the digital data stored in the storage cell of the memory cell is isolated from the read bit line.

Neural hashing for similarity search

Granted: September 19, 2023
Patent Number: 11763136
A system for training a neural-network-based floating-point-to-binary feature vector encoder preserves the locality relationships between samples in an input space over to an output space. The system includes a neural network under training and a probability distribution loss function generator. The neural network has floating-point inputs and floating-point pseudo-bipolar outputs. The generator compares an input probability distribution constructed from floating-point cosine…

Concurrent multi-bit adder

Granted: June 20, 2023
Patent Number: 11681497
A method for an associative memory device includes storing a plurality of pairs of N-bit numbers A and B to be added together in columns of a memory array of the associative memory device, each pair in a column, each bit in a row of the column, and dividing each N-bit number A and B into groups containing M bits each, having group carry-out predictions for every group except a first group, the group carry-out predictions calculated for any possible group carry-in value, and, once the…

Memory device for determining an extreme value

Granted: June 6, 2023
Patent Number: 11670369
A method to determine an extreme value of a plurality of data candidates includes storing each data candidate of a plurality of data candidates in a separate column of an associative memory, initializing a row of marker bits by setting each marker bit to a value of 1, computing a subsequent row of marker bits by performing in parallel a Boolean AND operation between a previous row of marker bits and a row of bits of the data candidates, starting with the row of most significant bits of…

Efficient similarity search

Granted: May 9, 2023
Patent Number: 11645292
A system for measuring similarity between a binary query vector and a plurality of binary candidate vectors includes a storage unit and a processor. The storage unit stores the binary query vector and the plurality of candidate vectors, and the processor performs Tanimoto calculations in terms of Hamming distances. The processor includes a Tanimoto to Hamming threshold converter, a Hamming measurer, and a Hamming comparator. The Tanimoto to Hamming threshold converter converts a Tanimoto…