Passivation of photonic integrated circuits (PICs)
Granted: June 2, 2005
Application Number:
20050117834
A photonic integrated circuit (PIC) comprises a plurality of integrated optically coupled components formed in a surface of the PIC and a passivating layer overlies at least a portion of the PIC surface. The overlying passivating layer comprises a material selected from the group consisting of BCB, ZnS and ZnSe. Also, when the circuits are PIC chips are die in the semiconductor wafer, a plurality of linear cleave streets are formed in a wafer passivation layer where a pattern of the…
In-wafer testing of integrated optical components in photonic integrated circuits (PICs)
Granted: May 26, 2005
Application Number:
20050111779
Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).
Method of reducing insertion loss in a transition region between a plurality of input or output waveguides to a free space coupler region
Granted: May 26, 2005
Application Number:
20050111780
A method for reducing insertion loss in a transition region between a plurality of input or output waveguides to a free space coupler region in a photonic integrated circuit (PIC) includes the steps of forming a passivation layer over the waveguides and region and forming the passivation overlayer such that it monotonically increases in thickness through the transition region to the free space coupler region.
Chromatic dispersion compensator (CDC) in a photonic integrated circuit (PIC) chip and method of operation
Granted: May 26, 2005
Application Number:
20050111848
An optical equalizer/dispersion compensator (E/CDC) comprises an input/output for receiving a multiplexed channel signal comprising a plurality of channel signals of different wavelengths. An optical amplifier may be coupled to receive, as an input/output, the multiplexed channel signals which amplifier may be a semiconductor optical amplifier (SOA) or a gain clamped-semiconductor optical amplifier (GC-SOA). A variable optical attenuator (VOA) is coupled to the optical amplifier and a…
In-wafer testing of integrated optical components in photonic integrated circuits (PICs)
Granted: May 19, 2005
Application Number:
20050105843
Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).
Method and apparatus for a polarization insensitive arrayed waveguide grating (AWG)
Granted: May 12, 2005
Application Number:
20050100278
An arrayed waveguide grating (AWG) comprises at least two free space regions, a plurality of grating arms extending between the two space regions, a passivation layer formed over the arrayed waveguide grating and a plurality of inputs at least to one of the free space regions to receive a plurality of channel signals separated by a predetermined channel spacing. A depth of the passivation layer chosen by providing a TE to TM wavelength shift between TE and TM modes propagating through…
Optical waveguide device with reduced insertion loss between optical waveguides coupled to a free space region
Granted: May 12, 2005
Application Number:
20050100279
An optical waveguide device, power coupler, a star coupler, a MMI coupler, an arrayed waveguide grating (AWG) or an Echelle grating, having at least one free space region with a plurality of optical waveguides coupled as inputs and separated by channels having a angled bottom portion, the channels monotonically decreasing in size or shape in a direction toward the free space region and optically coupling with adjacent waveguides at the interface region between the optical waveguides and…
Method for forming and apparatus comprising optical waveguides leading to a free space coupler region
Granted: May 12, 2005
Application Number:
20050100300
A method for forming and apparatus comprising a free space coupler region having a plurality of optical waveguides coupled to the space coupler region at an interface region, the waveguides converging with one another to the interface region, and a trench formed between adjacent waveguides, the depth of the trench or trenches extending from an outer point to the interface region and monotonically decreasing in depth from the outer point to the interface region.
Monolithic transmitter/receiver photonic integrated circuit (Tx/RxPIC) transceiver chip
Granted: May 12, 2005
Application Number:
20050100345
A single monolithic transceiver chip for handling optical to electrical to optical conversion of optical WDM signals in an optical transmission network which has an optical WDM signal input for reception of a WDM signal and an optical WDM signal output for transmission of a WDM signal and a plurality of electrical signal outputs and a plurality of electrical signal inputs. The chip further comprises an integrated decombiner coupled to the optical signal input that separates the WDM…
Method of calibrating a monolithic transmitter photonic integrated circuit (TxPIC) chip
Granted: May 5, 2005
Application Number:
20050094926
A method of calibrating a monolithic transmitter photonic integrated circuit (TxPIC) chip is disclosed where the chip contains integrated arrays of laser sources and electro-optic modulators forming a plurality of different wavelength signal channels where each laser source on the chip is sequentially selected and tested for the output power and operational wavelength. Calibration data is initially determined by checking an amount of output power of each laser output and any offset of…
Probe card for testing in-wafer photonic integrated circuits (PICs) and method of use
Granted: May 5, 2005
Application Number:
20050094927
Method and apparatus for utilizing a probe card for testing in-wafer photonic integrated circuits (PICs) comprising a plurality of in-wafer photonic integrated circuit (PIC) die formed in the surface of a semiconductor wafer where each PIC comprises one or more electro-optic components with formed wafer-surface electrical contacts. The probe card has a probe card body with at least one row of downwardly dependent, electrically conductive contact probes. The probe body is transversely…
Method of in-wafer testing of monolithic photonic integrated circuits (PICs) formed in a semiconductor wafer
Granted: May 5, 2005
Application Number:
20050094925
A method of in-wafer testing is provided for a monolithic photonic integrated circuit (PIC) formed in a semiconductor wafer where each such in-wafer circuit comprises two or more integrated electro-optic components, one of each in tandem forming a signal channel in the circuit. The method includes the provision of a first integrated photodetector at a rear end of each signal channel and a second integrated photodetector at forward end of each signal channel. Then, the testing is…
Monitoring of a laser source with front and rear output photodetectors to determine frontal laser power and power changes over laser lifetime
Granted: April 21, 2005
Application Number:
20050084202
A power monitoring and correction to a desired power level of a laser or group of lasers utilizes two photodetectors which are employed to accurately determine the amount of output power from the front end or “customer” end of a laser or a plurality of such lasers. During power detection, which may be accomplished intermittently or continuously, the laser is modulated with a tone of low frequency modulation. One photodetector at the rear of the laser is employed to detect the DC…
Method and apparatus for providing an antireflection coating on the output facet of a photonic integrated circuit (PIC) chip
Granted: March 24, 2005
Application Number:
20050063636
An on-chip photodiode is provided in a photonic integrated circuit (PIC) on a semiconductor chip to monitor or check for antireflection qualities of an AR coating applied to the front facet of the semiconductor chip.
Transmission line with low dispersive properties and its application in equalization
Granted: March 10, 2005
Application Number:
20050052255
A transmission line is provided with added shunt resistance, RSH, distributed along the length of the micro transmission line permitting the extension of constant characteristic impedance to the transmission line to lower signal frequencies. The loss in gain to the signal propagating the transmission line due to the added resistance can be compensated for by amplification provided at the output of the transmission line or at output taps provided along the length of the transmission line…
Oxygen-doped al-containing current blocking layers in active semiconductor devices in photonic integrated circuits (PICs)
Granted: February 24, 2005
Application Number:
20050040415
In photonic integrated circuits (PICs) having at least one active semiconductor device, such as, a buried heterostructure semiconductor laser, LED, modulator, photodiode, heterojunction bipolar transistor, field effect transistor or other active device, a plurality of semiconductor layers are formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a…
Submount for a photonic integrated circuit (PIC) chip
Granted: February 3, 2005
Application Number:
20050025409
A photonic integrated circuit (PIC) chip with a plurality of electro-optic components formed on a major surface of the chip and a submount that includes a substrate that extends over the major surface of the chip forming an air gap between the substrate and the major surface, the substrate to support electrical leads for electrical connection to some of the electro-optic components on the chip major surface.
Contact length trimming or vernier resistor trimming of a semiconductor laser source contact to change the source applied current density and resulting operational wavelength
Granted: January 27, 2005
Application Number:
20050018720
A laser source or a plurality of laser sources in a photonic integrated circuit (PIC) are provided with an electrical contact that is either segmented or is connected to a series of vernier resistor segments for supply of current to operate the laser source. In either case, at least one segment of the laser contact or at least one vernier resistor segment can be trimmed in order to vary the amount of current supplied to the laser source resulting in a change to its current density and,…
Method of operating an array of laser sources integrated in a monolithic chip or in a photonic integrated circuit (PIC)
Granted: January 27, 2005
Application Number:
20050018721
A method of operating an array of laser sources integrated as an array in a single monolithic chip where the steps include designing the laser sources to have different target emission wavelengths so that together they form a spectral emission wavelength grid, coupling outputs from the laser sources to an array of gain/loss elements also integrated on the single monolithic chip, one each receiving the output from a respective laser source; and adjusting the outputs with the gain/loss…
Method of tuning optical components integrated on a monolithic chip
Granted: January 20, 2005
Application Number:
20050013330
A method of tuning optical components integrated on a monolithic chip, such as an optical transmitter photonic integrated circuit (TxPIC), is disclosed where a group of first optical components are each fabricated to have an operating wavelength approximating a wavelength on a standardized or predetermined wavelength grid and are each included with a local wavelength tuning component also integrated in the chip. Each of the first optical components is wavelength tuned through their local…
